diff options
| author | Johnny Chen <johnny.chen@apple.com> | 2010-04-15 01:20:56 +0000 |
|---|---|---|
| committer | Johnny Chen <johnny.chen@apple.com> | 2010-04-15 01:20:56 +0000 |
| commit | 44398693e767f10c1c7edea3578796f12e05af6e (patch) | |
| tree | 703433cd6b00fac94f3f44c99fe2601763135206 /lib | |
| parent | 22d286b218f3267d57c507678b1af0fccc3a5df0 (diff) | |
Wrap the error msgs in DEBUG() macro so that they won't appear in NDEBUG build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101329 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp | 9 | ||||
| -rw-r--r-- | lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h | 2 |
2 files changed, 7 insertions, 4 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp index 0f3a67db8f..b72571066d 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp @@ -13,8 +13,11 @@ // //===----------------------------------------------------------------------===// +#define DEBUG_TYPE "arm-disassembler" + #include "ARMDisassemblerCore.h" #include "ARMAddressingModes.h" +#include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" /// ARMGenInstrInfo.inc - ARMGenInstrInfo.inc contains the static const @@ -346,7 +349,7 @@ static unsigned getRegisterEnum(BO B, unsigned RegClassID, unsigned RawRegister, } break; } - errs() << "Invalid (RegClassID, RawRegister) combination\n"; + DEBUG(errs() << "Invalid (RegClassID, RawRegister) combination\n"); // Encoding error. Mark the builder with error code != 0. B->SetErr(-1); return 0; @@ -893,7 +896,7 @@ static inline bool getBFCInvMask(uint32_t insn, uint32_t &mask) { uint32_t msb = slice(insn, 20, 16); uint32_t Val = 0; if (msb < lsb) { - errs() << "Encoding error: msb < lsb\n"; + DEBUG(errs() << "Encoding error: msb < lsb\n"); return false; } @@ -1911,7 +1914,7 @@ static bool DisassembleVFPLdStMulFrm(MCInst &MI, unsigned Opcode, uint32_t insn, ARM_AM::AMSubMode SubMode = getAMSubModeForBits(getPUBits(insn)); // Must be either "ia" or "db" submode. if (SubMode != ARM_AM::ia && SubMode != ARM_AM::db) { - errs() << "Illegal addressing mode 5 sub-mode!\n"; + DEBUG(errs() << "Illegal addressing mode 5 sub-mode!\n"); return false; } diff --git a/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h b/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h index 4bc407095a..3a6a3926f2 100644 --- a/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h +++ b/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h @@ -1553,7 +1553,7 @@ static bool DisassembleThumb2DPBinImm(MCInst &MI, unsigned Opcode, MI.addOperand(MCOperand::CreateImm(getLsb(insn))); if (Opcode == ARM::t2BFI) { if (getMsb(insn) < getLsb(insn)) { - errs() << "Encoding error: msb < lsb\n"; + DEBUG(errs() << "Encoding error: msb < lsb\n"); return false; } MI.addOperand(MCOperand::CreateImm(getMsb(insn) - getLsb(insn) + 1)); |