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authorMisha Brukman <brukman+llvm@gmail.com>2002-12-04 23:57:03 +0000
committerMisha Brukman <brukman+llvm@gmail.com>2002-12-04 23:57:03 +0000
commit2adb3959f629bdacab0e47b29e52139595523236 (patch)
tree90df404ccdc70cd840fc812a936b9b5e250f805a /lib
parent1f283ef3e5051354e5751850db03746c2fa8def1 (diff)
Implemented functions for emitting prologues and epilogues;
removed EBP from the list of callee-saved registers (it isn't one). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4929 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/X86/X86RegisterInfo.cpp55
-rw-r--r--lib/Target/X86/X86RegisterInfo.h8
2 files changed, 62 insertions, 1 deletions
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index ef4fce5e96..a1ed317bd6 100644
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -58,7 +58,7 @@ unsigned X86RegisterInfo::getStackPointer() const {
}
const unsigned* X86RegisterInfo::getCalleeSaveRegs() const {
- static const unsigned CalleeSaveRegs[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP,
+ static const unsigned CalleeSaveRegs[] = { X86::ESI, X86::EDI, X86::EBX,
MRegisterInfo::NoRegister };
return CalleeSaveRegs;
}
@@ -69,3 +69,56 @@ const unsigned* X86RegisterInfo::getCallerSaveRegs() const {
MRegisterInfo::NoRegister };
return CallerSaveRegs;
}
+
+MachineBasicBlock::iterator
+X86RegisterInfo::emitPrologue(MachineBasicBlock *MBB,
+ MachineBasicBlock::iterator MBBI,
+ unsigned numBytes) const
+{
+ MachineInstr *MI;
+
+ // PUSH ebp
+ MI = BuildMI (X86::PUSHr32, 1).addReg(X86::EBP);
+ MBBI = ++(MBB->insert(MBBI, MI));
+
+ // MOV ebp, esp
+ MI = BuildMI (X86::MOVrr32, 2).addReg(X86::EBP).addReg(X86::ESP);
+ MBBI = ++(MBB->insert(MBBI, MI));
+
+ // adjust stack pointer
+ MI = BuildMI(X86::SUBri32, 2).addReg(X86::ESP).addZImm(numBytes);
+ MBBI = ++(MBB->insert(MBBI, MI));
+
+ // PUSH all callee-save registers
+ const unsigned* regs = getCalleeSaveRegs();
+ while (*regs) {
+ MI = BuildMI(X86::PUSHr32, 1).addReg(*regs);
+ MBBI = ++(MBB->insert(MBBI, MI));
+ ++regs;
+ }
+
+ return MBBI;
+}
+
+MachineBasicBlock::iterator
+X86RegisterInfo::emitEpilogue(MachineBasicBlock *MBB,
+ MachineBasicBlock::iterator MBBI,
+ unsigned numBytes) const
+{
+ MachineInstr *MI;
+
+ // POP all callee-save registers in REVERSE ORDER
+ static const unsigned regs[] = { X86::EBX, X86::EDI, X86::ESI,
+ MRegisterInfo::NoRegister };
+ unsigned idx = 0;
+ while (regs[idx]) {
+ MI = BuildMI(X86::POPr32, 1).addReg(regs[idx++]);
+ MBBI = ++(MBB->insert(MBBI, MI));
+ }
+
+ // insert LEAVE
+ MI = BuildMI(X86::LEAVE, 0);
+ MBBI = ++(MBB->insert(MBBI, MI));
+
+ return MBBI;
+}
diff --git a/lib/Target/X86/X86RegisterInfo.h b/lib/Target/X86/X86RegisterInfo.h
index be3cbc09bc..76950e8d88 100644
--- a/lib/Target/X86/X86RegisterInfo.h
+++ b/lib/Target/X86/X86RegisterInfo.h
@@ -35,6 +35,14 @@ struct X86RegisterInfo : public MRegisterInfo {
const unsigned* getCalleeSaveRegs() const;
const unsigned* getCallerSaveRegs() const;
+ MachineBasicBlock::iterator emitPrologue(MachineBasicBlock *MBB,
+ MachineBasicBlock::iterator MBBI,
+ unsigned numBytes) const;
+
+ MachineBasicBlock::iterator emitEpilogue(MachineBasicBlock *MBB,
+ MachineBasicBlock::iterator MBBI,
+ unsigned numBytes) const;
+
/// Returns register class appropriate for input SSA register
///
const TargetRegisterClass *getClassForReg(unsigned Reg) const;