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authorRuchira Sasanka <sasanka@students.uiuc.edu>2001-11-15 20:25:07 +0000
committerRuchira Sasanka <sasanka@students.uiuc.edu>2001-11-15 20:25:07 +0000
commit295264dcb47df36832c16b06f9346695f801f75f (patch)
treed0f4d7dc7eba17b9bece110dc237b16e6c66e607 /lib
parentba9d5dba2556de71bb8f3ecca5574450a0197949 (diff)
changed since names of some methods in PhyRegAlloc changed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1324 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/SparcV9/SparcV9RegInfo.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/SparcV9/SparcV9RegInfo.cpp b/lib/Target/SparcV9/SparcV9RegInfo.cpp
index e59a3ab2b4..5103ae71bf 100644
--- a/lib/Target/SparcV9/SparcV9RegInfo.cpp
+++ b/lib/Target/SparcV9/SparcV9RegInfo.cpp
@@ -707,7 +707,7 @@ void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI,
// fails, then use the following code. Currently, we cannot call the
// above method since we cannot find LVSetBefore without the BB
- int TReg = PRA.getRegNotUsedByThisInst( LR->getRegClass(), CallMI );
+ int TReg = PRA.getUniRegNotUsedByThisInst( LR->getRegClass(), CallMI );
/**** NOTE: THIS SHOULD USE THE RIGHT SIZE FOR THE REG BEING PUSHED ****/
int TmpOff = PRA.mcInfo.pushTempValue(target, 8);
@@ -1194,7 +1194,7 @@ void UltraSparcRegInfo::insertCallerSavingCode(const MachineInstr *MInst,
// get a free INTEGER register
int FreeIntReg =
- PRA.getUsableRegAtMI(LR->getRegClass(), IntRegType, MInst,
+ PRA.getUsableUniRegAtMI(LR->getRegClass(), IntRegType, MInst,
LVSetBef, AdIBefCC, AdIAftCC);
// insert the instructions in reverse order since we are
@@ -1232,7 +1232,7 @@ void UltraSparcRegInfo::insertCallerSavingCode(const MachineInstr *MInst,
// get a free INT register
int FreeIntReg =
- PRA.getUsableRegAtMI(LR->getRegClass(), IntRegType, MInst,
+ PRA.getUsableUniRegAtMI(LR->getRegClass(), IntRegType, MInst,
LVSetAft, AdIBefCC, AdIAftCC);
if(AdIBefCC)