diff options
| author | Dan Gohman <gohman@apple.com> | 2009-01-21 14:50:16 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-01-21 14:50:16 +0000 |
| commit | 1ef4d8f7ee60f724eff2175ed22f75a60eb8d50d (patch) | |
| tree | f5deef088f589e4ace600983207a55229e16185d /lib | |
| parent | 1421b7bc23f39e57052a51f4647512936f45b12f (diff) | |
Fix a recent regression. ClrOpcode is not set for i8; for i8, if
we want to clear %ah to zero before a division, just use a
zero-extending mov to %al. This fixes PR3366.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62691 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/X86/X86ISelDAGToDAG.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 9b42d00b65..c1d886c32f 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -1381,9 +1381,10 @@ SDNode *X86DAGToDAGISel::Select(SDValue N) { SDValue Tmp0, Tmp1, Tmp2, Tmp3; bool foldedLoad = TryFoldLoad(N, N1, Tmp0, Tmp1, Tmp2, Tmp3); + bool signBitIsZero = CurDAG->SignBitIsZero(N0); SDValue InFlag; - if (NVT == MVT::i8 && !isSigned) { + if (NVT == MVT::i8 && (!isSigned || signBitIsZero)) { // Special case for div8, just use a move with zero extension to AX to // clear the upper 8 bits (AH). SDValue Tmp0, Tmp1, Tmp2, Tmp3, Move, Chain; @@ -1405,7 +1406,7 @@ SDNode *X86DAGToDAGISel::Select(SDValue N) { InFlag = CurDAG->getCopyToReg(CurDAG->getEntryNode(), LoReg, N0, SDValue()).getValue(1); - if (isSigned && !CurDAG->SignBitIsZero(N0)) { + if (isSigned && !signBitIsZero) { // Sign extend the low part into the high part. InFlag = SDValue(CurDAG->getTargetNode(SExtOpcode, MVT::Flag, InFlag), 0); |