diff options
| author | Reid Spencer <rspencer@reidspencer.com> | 2006-10-26 06:15:43 +0000 |
|---|---|---|
| committer | Reid Spencer <rspencer@reidspencer.com> | 2006-10-26 06:15:43 +0000 |
| commit | 1628cec4d7fce310d9cde0bcc73997e5a71692c4 (patch) | |
| tree | 6dff5a70de8406b153e32fdd2d60c782d6202f63 /lib/VMCore/Instruction.cpp | |
| parent | 7043d00750c558a518d08a638638ebe4d241f159 (diff) | |
For PR950:
Make necessary changes to support DIV -> [SUF]Div. This changes llvm to
have three division instructions: signed, unsigned, floating point. The
bytecode and assembler are bacwards compatible, however.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31195 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/VMCore/Instruction.cpp')
| -rw-r--r-- | lib/VMCore/Instruction.cpp | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/lib/VMCore/Instruction.cpp b/lib/VMCore/Instruction.cpp index b2951461d7..c5e8e30354 100644 --- a/lib/VMCore/Instruction.cpp +++ b/lib/VMCore/Instruction.cpp @@ -94,7 +94,9 @@ const char *Instruction::getOpcodeName(unsigned OpCode) { case Add: return "add"; case Sub: return "sub"; case Mul: return "mul"; - case Div: return "div"; + case UDiv: return "udiv"; + case SDiv: return "sdiv"; + case FDiv: return "fdiv"; case Rem: return "rem"; // Logical operators... @@ -221,7 +223,9 @@ bool Instruction::isComparison(unsigned op) { /// bool Instruction::isTrapping(unsigned op) { switch(op) { - case Div: + case UDiv: + case SDiv: + case FDiv: case Rem: case Load: case Store: |