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authorTom Stellard <thomas.stellard@amd.com>2013-04-15 17:51:35 +0000
committerTom Stellard <thomas.stellard@amd.com>2013-04-15 17:51:35 +0000
commit9a256300f8f61937f5f7a148b9cb09936d103a97 (patch)
treea4a19d533d9d7f04e888dd2a6c66bde5640a9bb0 /lib/Transforms/Vectorize/VecUtils.cpp
parentbf1efe642111043eeb7ccaf3da759f4d2d1e4647 (diff)
R600/SI: Emit config values in register value pairs.
Instead of emitting config values in a predefined order, the code emitter will now emit a 32-bit register index followed by the 32-bit config value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179546 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Transforms/Vectorize/VecUtils.cpp')
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