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| author | Bill Wendling <isanbard@gmail.com> | 2010-12-14 03:36:38 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2010-12-14 03:36:38 +0000 |
| commit | f4caf69720d807573c50d41aa06bcec1c99bdbbd (patch) | |
| tree | bdf33e0c29180acbfd4f2f74dcfd78e3d1866bdf /lib/Transforms/Utils/SimplifyCFG.cpp | |
| parent | 0c1aec18911f2a67fb37b6593d08f4f8cb7e18ef (diff) | |
The tLDR et al instructions were emitting either a reg/reg or reg/imm
instruction based on the t_addrmode_s# mode and what it returned. There is some
obvious badness to this. In particular, it's hard to do MC-encoding when the
instruction may change out from underneath you after the t_addrmode_s# variable
is finally resolved.
The solution is to revert a long-ago change that merged the reg/reg and reg/imm
versions. There is the addition of several new addressing modes. They no longer
have extraneous operands associated with them. I.e., if it's reg/reg we don't
have to have a dummy zero immediate tacked on to the SDNode.
There are some obvious cleanups here, which will happen shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121747 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Transforms/Utils/SimplifyCFG.cpp')
0 files changed, 0 insertions, 0 deletions