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authorZhou Sheng <zhousheng00@gmail.com>2007-03-13 06:40:59 +0000
committerZhou Sheng <zhousheng00@gmail.com>2007-03-13 06:40:59 +0000
commitb277b16593d892421f1bda0e76ada00ac67c539b (patch)
tree73b2aa10e5f8242d2bce118b22fb12f9bea44267 /lib/Transforms/Scalar/InstructionCombining.cpp
parentb991dfeae75fba839150a21272a2aa875ec3945f (diff)
For expression like
"APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth)", to handle ShiftAmt == BitWidth situation, use zextOrCopy() instead of zext(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35080 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Transforms/Scalar/InstructionCombining.cpp')
-rw-r--r--lib/Transforms/Scalar/InstructionCombining.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp
index 5dbc5240e8..bd88fccc22 100644
--- a/lib/Transforms/Scalar/InstructionCombining.cpp
+++ b/lib/Transforms/Scalar/InstructionCombining.cpp
@@ -1995,7 +1995,7 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
RHSKnownZero <<= ShiftAmt;
RHSKnownOne <<= ShiftAmt;
// low bits known zero.
- RHSKnownZero |= APInt::getAllOnesValue(ShiftAmt).zext(BitWidth);
+ RHSKnownZero |= APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth);
}
break;
case Instruction::LShr:
@@ -2012,7 +2012,7 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
assert((RHSKnownZero & RHSKnownOne) == 0 &&
"Bits known to be one AND zero?");
// Compute the new bits that are at the top now.
- APInt HighBits(APInt::getAllOnesValue(ShiftAmt).zext(BitWidth).shl(
+ APInt HighBits(APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth).shl(
BitWidth - ShiftAmt));
RHSKnownZero &= TypeMask;
RHSKnownOne &= TypeMask;
@@ -2046,7 +2046,7 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
assert((RHSKnownZero & RHSKnownOne) == 0 &&
"Bits known to be one AND zero?");
// Compute the new bits that are at the top now.
- APInt HighBits(APInt::getAllOnesValue(ShiftAmt).zext(BitWidth).shl(
+ APInt HighBits(APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth).shl(
BitWidth - ShiftAmt));
RHSKnownZero &= TypeMask;
RHSKnownOne &= TypeMask;