diff options
author | Bob Wilson <bob.wilson@apple.com> | 2011-12-20 01:29:27 +0000 |
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committer | Bob Wilson <bob.wilson@apple.com> | 2011-12-20 01:29:27 +0000 |
commit | c0b0e57a87aa5e52e0a45af75fc1cee78d8f2bc6 (patch) | |
tree | fcb107703c6b609205031d2644d29e3d398dca0f /lib/Target | |
parent | b5e8b8c8f762ae9a95f52a477440e426622d5446 (diff) |
Mark ARM eh_sjlj_dispatchsetup as clobbering all registers. Radar 10567930.
We used to rely on the *eh_sjlj_setjmp instructions to mark that a function
with setjmp/longjmp exception handling clobbers all the registers. But with
the recent reorganization of ARM EH, those eh_sjlj_setjmp instructions are
expanded away earlier, before PEI can see them to determine what registers to
save and restore. Mark the dispatchsetup instruction in the same way, since
that instruction cannot be expanded early. This also more accurately reflects
when the registers are clobbered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146949 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 516a0801ae..d4dc561588 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -4741,8 +4741,11 @@ def Int_eh_sjlj_longjmp : PseudoInst<(outs), (ins GPR:$src, GPR:$scratch), // This pseudo is used for ARM, Thumb1 and Thumb2. Any differences are // handled when the pseudo is expanded (which happens before any passes // that need the instruction size). -let isBarrier = 1 in -def eh_sjlj_dispatchsetup : PseudoInst<(outs), (ins), NoItinerary, []>; +let Defs = + [ R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, LR, CPSR, + QQQQ0, QQQQ1, QQQQ2, QQQQ3 ], isBarrier = 1 in { + def eh_sjlj_dispatchsetup : PseudoInst<(outs), (ins), NoItinerary, []>; +} //===----------------------------------------------------------------------===// // Non-Instruction Patterns |