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authorAkira Hatanaka <ahatanaka@mips.com>2012-12-21 23:13:59 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2012-12-21 23:13:59 +0000
commit189225369446136f82e080dbdcab3a0fa63c71ac (patch)
tree945dd562299aba98065ab5d386472db8e4de2c60 /lib/Target
parent6a8309e62afd88fbea4f1c39121de6dc4dc0d899 (diff)
[mips] Fix encoding of BAL instruction. Also, fix assembler test case which
was not catching the error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170953 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r--lib/Target/Mips/MipsInstrInfo.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td
index cfbcf83141..6603dff05d 100644
--- a/lib/Target/Mips/MipsInstrInfo.td
+++ b/lib/Target/Mips/MipsInstrInfo.td
@@ -859,7 +859,7 @@ def BGTZ : CBranchZero<"bgtz", setgt, CPURegs>, BGEZ_FM<7, 0>;
def BLEZ : CBranchZero<"blez", setle, CPURegs>, BGEZ_FM<6, 0>;
def BLTZ : CBranchZero<"bltz", setlt, CPURegs>, BGEZ_FM<1, 0>;
-let rt = 0, rs = 0, isBranch = 1, isTerminator = 1, isBarrier = 1,
+let rt = 0x11, rs = 0, isBranch = 1, isTerminator = 1, isBarrier = 1,
hasDelaySlot = 1, Defs = [RA] in
def BAL_BR: FI<0x1, (outs), (ins brtarget:$imm16), "bal\t$imm16", [], IIBranch>;