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| author | Evan Cheng <evan.cheng@apple.com> | 2011-07-19 06:37:02 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2011-07-19 06:37:02 +0000 |
| commit | 439661395fd2a2a832dba01c65bc88718528313c (patch) | |
| tree | e8091900c4d2f3278f5237358edeb7f22275cb77 /lib/Target/XCore/XCoreTargetMachine.cpp | |
| parent | 939ece1b5c6c2f142476b477daa573046fa1b8da (diff) | |
Introduce MCCodeGenInfo, which keeps information that can affect codegen
(including compilation, assembly). Move relocation model Reloc::Model from
TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135468 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/XCore/XCoreTargetMachine.cpp')
| -rw-r--r-- | lib/Target/XCore/XCoreTargetMachine.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/XCore/XCoreTargetMachine.cpp b/lib/Target/XCore/XCoreTargetMachine.cpp index 342966ae5c..0c0267dd69 100644 --- a/lib/Target/XCore/XCoreTargetMachine.cpp +++ b/lib/Target/XCore/XCoreTargetMachine.cpp @@ -19,10 +19,10 @@ using namespace llvm; /// XCoreTargetMachine ctor - Create an ILP32 architecture model /// -XCoreTargetMachine::XCoreTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, - const std::string &FS) - : LLVMTargetMachine(T, TT, CPU, FS), +XCoreTargetMachine::XCoreTargetMachine(const Target &T, StringRef TT, + StringRef CPU, + StringRef FS, Reloc::Model RM) + : LLVMTargetMachine(T, TT, CPU, FS, RM), Subtarget(TT, CPU, FS), DataLayout("e-p:32:32:32-a0:0:32-f32:32:32-f64:32:32-i1:8:32-i8:8:32-" "i16:16:32-i32:32:32-i64:32:32-n32"), |