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authorRichard Osborne <richard@xmos.com>2013-01-25 21:25:12 +0000
committerRichard Osborne <richard@xmos.com>2013-01-25 21:25:12 +0000
commit1f375e5bc78647f9b29564eafdc907250ccd91ed (patch)
tree7f342d9a82414c36b7a5155d48808e3e8bfbf9db /lib/Target/XCore/XCoreRegisterInfo.cpp
parent0f1bcedf5a871c360f2ca1354464d81cb81bdca7 (diff)
Use the correct format in the STW / SETPSC instruction names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173494 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/XCore/XCoreRegisterInfo.cpp')
-rw-r--r--lib/Target/XCore/XCoreRegisterInfo.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/XCore/XCoreRegisterInfo.cpp b/lib/Target/XCore/XCoreRegisterInfo.cpp
index e637d9a5be..7e3e4766a2 100644
--- a/lib/Target/XCore/XCoreRegisterInfo.cpp
+++ b/lib/Target/XCore/XCoreRegisterInfo.cpp
@@ -231,7 +231,7 @@ XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
.addReg(ScratchReg, RegState::Kill);
break;
case XCore::STWFI:
- BuildMI(MBB, II, dl, TII.get(XCore::STW_3r))
+ BuildMI(MBB, II, dl, TII.get(XCore::STW_l3r))
.addReg(Reg, getKillRegState(isKill))
.addReg(FrameReg)
.addReg(ScratchReg, RegState::Kill);