diff options
| author | Chris Lattner <sabre@nondot.org> | 2003-08-11 14:59:22 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2003-08-11 14:59:22 +0000 |
| commit | ac0c8680ad53c08189c23f39c79a2147378692df (patch) | |
| tree | f853925df2a8e14a96d9e679e5d16c5a8f061576 /lib/Target/X86/X86TargetMachine.cpp | |
| parent | fa7ed53f32917ef632b21753a772548dde8c2eed (diff) | |
Add support for a pattern matching instruction selector. This is still in
the early implementation phases, so it is disabled by default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7719 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86TargetMachine.cpp')
| -rw-r--r-- | lib/Target/X86/X86TargetMachine.cpp | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index 893e62fd4f..2de30f7245 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -20,6 +20,8 @@ namespace { cl::desc("Use Simple RA instead of Local RegAlloc")); cl::opt<bool> PrintCode("print-machineinstrs", cl::desc("Print generated machine code")); + cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true), + cl::desc("Use the 'simple' X86 instruction selector")); } // allocateX86TargetMachine - Allocate and return a subclass of TargetMachine @@ -59,7 +61,10 @@ bool X86TargetMachine::addPassesToJITCompile(PassManager &PM) { // FIXME: Implement the switch instruction in the instruction selector! PM.add(createLowerSwitchPass()); - PM.add(createX86SimpleInstructionSelector(*this)); + if (NoPatternISel) + PM.add(createX86SimpleInstructionSelector(*this)); + else + PM.add(createX86PatternInstructionSelector(*this)); // TODO: optional optimizations go here |