Disable switch lowering for targets based on the selection dag isel,

letting the code generator handle them directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27539 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 0 insertions, 10 deletions

diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index 44877d9b4d..b9dea3bcf3 100644
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -36,8 +36,6 @@ namespace {
   cl::opt<bool> DisableOutput("disable-x86-llc-output", cl::Hidden,
                               cl::desc("Disable the X86 asm printer, for use "
                                        "when profiling the code generator."));
-  cl::opt<bool> DisableLowerSwitch("disable-lower-switch", cl::Hidden,
-                                   cl::desc("Disable the LowerSwitch pass"));
   // Register the target.
   RegisterTarget<X86TargetMachine> X("x86", "  IA-32 (Pentium and above)");
 }
@@ -100,10 +98,6 @@ bool X86TargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
   // FIXME: Implement the invoke/unwind instructions!
   PM.add(createLowerInvokePass());
 
-  // FIXME: Implement the switch instruction in the instruction selector!
-  if (!DisableLowerSwitch)
-    PM.add(createLowerSwitchPass());
-  
   // Make sure that no unreachable blocks are instruction selected.
   PM.add(createUnreachableBlockEliminationPass());
 
@@ -169,10 +163,6 @@ void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
   // FIXME: Implement the invoke/unwind instructions!
   PM.add(createLowerInvokePass());
 
-  // FIXME: Implement the switch instruction in the instruction selector!
-  if (!DisableLowerSwitch)
-    PM.add(createLowerSwitchPass());
-
   // Make sure that no unreachable blocks are instruction selected.
   PM.add(createUnreachableBlockEliminationPass());