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authorBrian Gaeke <gaeke@uiuc.edu>2004-03-04 19:16:23 +0000
committerBrian Gaeke <gaeke@uiuc.edu>2004-03-04 19:16:23 +0000
commit323819e4e1e3573072e7dbd82b0ebd75b5df0648 (patch)
tree6dccce862eb949adb13ce1e46475e1e16fcd97d0 /lib/Target/X86/X86TargetMachine.cpp
parentce1e500e2f2e25da5164302af25573d828c4a11d (diff)
make -print-machineinstrs work for both SparcV9 and X86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12122 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86TargetMachine.cpp')
-rw-r--r--lib/Target/X86/X86TargetMachine.cpp18
1 files changed, 8 insertions, 10 deletions
diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index 4886a11481..31c5e578ea 100644
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -25,8 +25,6 @@
using namespace llvm;
namespace {
- cl::opt<bool> PrintCode("print-machineinstrs",
- cl::desc("Print generated machine code"));
cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true),
cl::desc("Use the 'simple' X86 instruction selector"));
cl::opt<bool> NoSSAPeephole("disable-ssa-peephole", cl::init(true),
@@ -79,18 +77,18 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
PM.add(createX86SSAPeepholeOptimizerPass());
// Print the instruction selected machine code...
- if (PrintCode)
+ if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
// Perform register allocation to convert to a concrete x86 representation
PM.add(createRegisterAllocator());
- if (PrintCode)
+ if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
PM.add(createX86FloatingPointStackifierPass());
- if (PrintCode)
+ if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
// Insert prolog/epilog code. Eliminate abstract frame index references...
@@ -98,7 +96,7 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
PM.add(createX86PeepholeOptimizerPass());
- if (PrintCode) // Print the register-allocated code
+ if (PrintMachineCode) // Print the register-allocated code
PM.add(createX86CodePrinterPass(std::cerr, *this));
if (!DisableOutput)
@@ -138,18 +136,18 @@ void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
// FIXME: Add SSA based peephole optimizer here.
// Print the instruction selected machine code...
- if (PrintCode)
+ if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
// Perform register allocation to convert to a concrete x86 representation
PM.add(createRegisterAllocator());
- if (PrintCode)
+ if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
PM.add(createX86FloatingPointStackifierPass());
- if (PrintCode)
+ if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
// Insert prolog/epilog code. Eliminate abstract frame index references...
@@ -157,7 +155,7 @@ void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
PM.add(createX86PeepholeOptimizerPass());
- if (PrintCode) // Print the register-allocated code
+ if (PrintMachineCode) // Print the register-allocated code
PM.add(createX86CodePrinterPass(std::cerr, TM));
}