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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2013-03-26 22:19:12 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2013-03-26 22:19:12 +0000 |
| commit | 6b359ecd43bbad20f417d7434d72bafccd6c2efe (patch) | |
| tree | 0e74ceda477e61ee7219c3ed211d802cdcaa95ca /lib/Target/X86/X86Schedule.td | |
| parent | d072a166d6c77ebcfb4fde796e0784a56020b9a4 (diff) | |
Enable SandyBridgeModel for all modern Intel P6 descendants.
All Intel CPUs since Yonah look a lot alike, at least at the granularity
of the scheduling models. We can add more accurate models for
processors that aren't Sandy Bridge if required. Haswell will probably
need its own.
The Atom processor and anything based on NetBurst is completely
different. So are the non-Intel chips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178080 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86Schedule.td')
| -rw-r--r-- | lib/Target/X86/X86Schedule.td | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/X86/X86Schedule.td b/lib/Target/X86/X86Schedule.td index 378be0a5df..782e771fd0 100644 --- a/lib/Target/X86/X86Schedule.td +++ b/lib/Target/X86/X86Schedule.td @@ -565,3 +565,4 @@ def GenericModel : SchedMachineModel { } include "X86ScheduleAtom.td" +include "X86SchedSandyBridge.td" |