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| author | Lang Hames <lhames@gmail.com> | 2012-01-10 22:53:20 +0000 |
|---|---|---|
| committer | Lang Hames <lhames@gmail.com> | 2012-01-10 22:53:20 +0000 |
| commit | 9ffaa6a8a916d88c7ffde6beea7faee1b93ad945 (patch) | |
| tree | b05c9ef3d544c25e40afd887e2dd7b17647d429e /lib/Target/X86/X86ISelLowering.cpp | |
| parent | 216f63702fabd57ac570feebc56005b2a5cb3216 (diff) | |
Fixed order of operands in comment to match code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147890 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index f153ef35ca..07451a5e74 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -13750,7 +13750,7 @@ static SDValue PerformOrCombine(SDNode *N, SelectionDAG &DAG, // Canonicalize pandn to RHS if (N0.getOpcode() == X86ISD::ANDNP) std::swap(N0, N1); - // or (and (m, x), (pandn m, y)) + // or (and (m, y), (pandn m, x)) if (N0.getOpcode() == ISD::AND && N1.getOpcode() == X86ISD::ANDNP) { SDValue Mask = N1.getOperand(0); SDValue X = N1.getOperand(1); |