diff options
author | Chris Lattner <sabre@nondot.org> | 2008-03-11 03:23:40 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2008-03-11 03:23:40 +0000 |
commit | 447ff68c08bc01aa040ae6d0291af69b55bb8e57 (patch) | |
tree | 08467f93f493ed3754b0af58a11729d25d9c38a1 /lib/Target/X86/X86ISelLowering.cpp | |
parent | c5733ac5d31b4cac5af0bc769411386d931237ba (diff) |
Change the model for FP Stack return to use fp operands on the
RET instruction instead of using FpSET_ST0_32. This also generalizes
the code to handling returning of multiple FP results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48209 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 32 |
1 files changed, 23 insertions, 9 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 179f600d49..d603e1bb98 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -853,27 +853,41 @@ SDOperand X86TargetLowering::LowerRET(SDOperand Op, SelectionDAG &DAG) { // Regular return. SDOperand Flag; + SmallVector<SDOperand, 6> RetOps; + RetOps.push_back(Chain); // Operand #0 = Chain (updated below) + // Operand #1 = Bytes To Pop + RetOps.push_back(DAG.getConstant(getBytesToPopOnReturn(), MVT::i16)); + // Copy the result values into the output registers. for (unsigned i = 0; i != RVLocs.size(); ++i) { CCValAssign &VA = RVLocs[i]; assert(VA.isRegLoc() && "Can only return in registers!"); SDOperand ValToCopy = Op.getOperand(i*2+1); - // If this is a copy from an xmm register to ST(0), use an FPExtend to - // change the value to the FP stack register class. - if (RVLocs[i].getLocReg() == X86::ST0 && - isScalarFPTypeInSSEReg(RVLocs[i].getValVT())) - ValToCopy = DAG.getNode(ISD::FP_EXTEND, MVT::f80, ValToCopy); + // Returns in ST0/ST1 are handled specially: these are pushed as operands to + // the RET instruction and handled by the FP Stackifier. + if (RVLocs[i].getLocReg() == X86::ST0 || + RVLocs[i].getLocReg() == X86::ST1) { + // If this is a copy from an xmm register to ST(0), use an FPExtend to + // change the value to the FP stack register class. + if (isScalarFPTypeInSSEReg(RVLocs[i].getValVT())) + ValToCopy = DAG.getNode(ISD::FP_EXTEND, MVT::f80, ValToCopy); + RetOps.push_back(ValToCopy); + // Don't emit a copytoreg. + continue; + } Chain = DAG.getCopyToReg(Chain, VA.getLocReg(), ValToCopy, Flag); Flag = Chain.getValue(1); } - SDOperand BytesToPop = DAG.getConstant(getBytesToPopOnReturn(), MVT::i16); + RetOps[0] = Chain; // Update chain. + + // Add the flag if we have it. if (Flag.Val) - return DAG.getNode(X86ISD::RET_FLAG, MVT::Other, Chain, BytesToPop, Flag); - else - return DAG.getNode(X86ISD::RET_FLAG, MVT::Other, Chain, BytesToPop); + RetOps.push_back(Flag); + + return DAG.getNode(X86ISD::RET_FLAG, MVT::Other, &RetOps[0], RetOps.size()); } |