diff options
author | Dan Gohman <gohman@apple.com> | 2009-02-07 16:15:20 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2009-02-07 16:15:20 +0000 |
commit | 1fdbc1dd4e9cb42c79a30e8dc308c322e923cc52 (patch) | |
tree | d0172d9e89acb9a020afc7b1e9a227dad978682c /lib/Target/X86/X86ISelLowering.cpp | |
parent | 5471a00977ab8ce3c88414dfbad99c0296d58508 (diff) |
Constify TargetInstrInfo::EmitInstrWithCustomInserter, allowing
ScheduleDAG's TLI member to use const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64018 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 56e6852f32..41526b65f1 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -6984,7 +6984,7 @@ X86TargetLowering::EmitAtomicBitwiseWithCustomInserter(MachineInstr *bInstr, unsigned notOpc, unsigned EAXreg, TargetRegisterClass *RC, - bool invSrc) { + bool invSrc) const { // For the atomic bitwise operator, we generate // thisMBB: // newMBB: @@ -7081,7 +7081,7 @@ X86TargetLowering::EmitAtomicBit6432WithCustomInserter(MachineInstr *bInstr, unsigned regOpcH, unsigned immOpcL, unsigned immOpcH, - bool invSrc) { + bool invSrc) const { // For the atomic bitwise operator, we generate // thisMBB (instructions are in pairs, except cmpxchg8b) // ld t1,t2 = [bitinstr.addr] @@ -7225,7 +7225,7 @@ X86TargetLowering::EmitAtomicBit6432WithCustomInserter(MachineInstr *bInstr, MachineBasicBlock * X86TargetLowering::EmitAtomicMinMaxWithCustomInserter(MachineInstr *mInstr, MachineBasicBlock *MBB, - unsigned cmovOpc) { + unsigned cmovOpc) const { // For the atomic min/max operator, we generate // thisMBB: // newMBB: @@ -7325,7 +7325,7 @@ X86TargetLowering::EmitAtomicMinMaxWithCustomInserter(MachineInstr *mInstr, MachineBasicBlock * X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, - MachineBasicBlock *BB) { + MachineBasicBlock *BB) const { DebugLoc dl = MI->getDebugLoc(); const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); switch (MI->getOpcode()) { |