Reduce code duplication on the TLS implementation.

This introduces a small regression on the generated code
quality in the case we are just computing addresses, not
loading values.

Will work on it and on X86-64 support.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68552 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 10 insertions, 19 deletions

diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index 7c998382fc..c54a996cb2 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -533,23 +533,6 @@ void Emitter::emitInstruction(const MachineInstr &MI,
     case X86::DWARF_LOC:
     case X86::FP_REG_KILL:
       break;
-    case X86::TLS_tp: {
-      MCE.emitByte(BaseOpcode);
-      unsigned RegOpcodeField = getX86RegNum(MI.getOperand(0).getReg());
-      MCE.emitByte(ModRMByte(0, RegOpcodeField, 5));
-      emitConstant(0, 4);
-      break;
-    }
-    case X86::TLS_gs_ri: {
-      MCE.emitByte(BaseOpcode);
-      unsigned RegOpcodeField = getX86RegNum(MI.getOperand(0).getReg());
-      MCE.emitByte(ModRMByte(0, RegOpcodeField, 5));
-      GlobalValue* GV = MI.getOperand(1).getGlobal();
-      unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
-        : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
-      emitGlobalAddress(GV, rt);
-      break;
-    }
     case X86::MOVPC32r: {
       // This emits the "call" portion of this pseudo instruction.
       MCE.emitByte(BaseOpcode);
@@ -661,13 +644,21 @@ void Emitter::emitInstruction(const MachineInstr &MI,
     break;
 
   case X86II::MRMSrcMem: {
-    intptr_t PCAdj = (CurOp + X86AddrNumOperands + 1 != NumOps) ?
+    // FIXME: Maybe lea should have its own form?
+    int AddrOperands;
+    if (Opcode == X86::LEA64r || Opcode == X86::LEA64_32r ||
+        Opcode == X86::LEA16r || Opcode == X86::LEA32r)
+      AddrOperands = X86AddrNumOperands - 1; // No segment register
+    else
+      AddrOperands = X86AddrNumOperands;
+
+    intptr_t PCAdj = (CurOp + AddrOperands + 1 != NumOps) ?
       X86InstrInfo::sizeOfImm(Desc) : 0;
 
     MCE.emitByte(BaseOpcode);
     emitMemModRMByte(MI, CurOp+1, getX86RegNum(MI.getOperand(CurOp).getReg()),
                      PCAdj);
-    CurOp += X86AddrNumOperands + 1;
+    CurOp += AddrOperands + 1;
     if (CurOp != NumOps)
       emitConstant(MI.getOperand(CurOp++).getImm(), X86InstrInfo::sizeOfImm(Desc));
     break;