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authorCraig Topper <craig.topper@gmail.com>2011-10-16 07:55:05 +0000
committerCraig Topper <craig.topper@gmail.com>2011-10-16 07:55:05 +0000
commitb53fa8bf19a51f0c49a9f8b6ede3e2ff3bdfb961 (patch)
treeb1e46ae4478216cfe10014153b5825026f99d329 /lib/Target/X86/X86.td
parentdc479c4a897bb7cc756370cc2051da79b65e7d16 (diff)
Add X86 BZHI instruction as well as BMI2 feature detection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142122 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86.td')
-rw-r--r--lib/Target/X86/X86.td4
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td
index 104b91fd35..7ee7df5de8 100644
--- a/lib/Target/X86/X86.td
+++ b/lib/Target/X86/X86.td
@@ -106,6 +106,8 @@ def FeatureLZCNT : SubtargetFeature<"lzcnt", "HasLZCNT", "true",
"Support LZCNT instruction">;
def FeatureBMI : SubtargetFeature<"bmi", "HasBMI", "true",
"Support BMI instructions">;
+def FeatureBMI2 : SubtargetFeature<"bmi2", "HasBMI2", "true",
+ "Support BMI2 instructions">;
//===----------------------------------------------------------------------===//
// X86 processors supported.
@@ -164,7 +166,7 @@ def : Proc<"core-avx-i", [FeatureSSE42, FeatureCMPXCHG16B,
def : Proc<"core-avx2", [FeatureSSE42, FeatureCMPXCHG16B, FeatureAES,
FeatureCLMUL, FeatureRDRAND, FeatureF16C,
FeatureFMA3, FeatureMOVBE, FeatureLZCNT,
- FeatureBMI]>;
+ FeatureBMI, FeatureBMI2]>;
def : Proc<"k6", [FeatureMMX]>;
def : Proc<"k6-2", [Feature3DNow]>;