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| author | Craig Topper <craig.topper@gmail.com> | 2011-12-29 18:47:31 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2011-12-29 18:47:31 +0000 |
| commit | 8493e3901446ef9177e12090f3b06d57d7bc1fd9 (patch) | |
| tree | 85e285be1e3ea98cfb07b0a04666791a05a26b75 /lib/Target/X86/X86.td | |
| parent | b75f5f7d5d3737c309937297c4d4e360153512bd (diff) | |
Add FeaturePOPCNT to all CPU types that lost it was removed from SSE42/SSE4A in r147339.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147347 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86.td')
| -rw-r--r-- | lib/Target/X86/X86.td | 31 |
1 files changed, 17 insertions, 14 deletions
diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td index ad3b3aa01c..88c6254337 100644 --- a/lib/Target/X86/X86.td +++ b/lib/Target/X86/X86.td @@ -146,31 +146,34 @@ def : Proc<"atom", [FeatureSSE3, FeatureCMPXCHG16B, FeatureMOVBE, FeatureSlowBTMem]>; // "Arrandale" along with corei3 and corei5 def : Proc<"corei7", [FeatureSSE42, FeatureCMPXCHG16B, - FeatureSlowBTMem, FeatureFastUAMem, FeatureAES]>; + FeatureSlowBTMem, FeatureFastUAMem, + FeaturePOPCNT, FeatureAES]>; def : Proc<"nehalem", [FeatureSSE42, FeatureCMPXCHG16B, - FeatureSlowBTMem, FeatureFastUAMem]>; + FeatureSlowBTMem, FeatureFastUAMem, + FeaturePOPCNT]>; // Westmere is a similar machine to nehalem with some additional features. // Westmere is the corei3/i5/i7 path from nehalem to sandybridge def : Proc<"westmere", [FeatureSSE42, FeatureCMPXCHG16B, - FeatureSlowBTMem, FeatureFastUAMem, FeatureAES, - FeatureCLMUL]>; + FeatureSlowBTMem, FeatureFastUAMem, + FeaturePOPCNT, FeatureAES, FeatureCLMUL]>; // Sandy Bridge // SSE is not listed here since llvm treats AVX as a reimplementation of SSE, // rather than a superset. // FIXME: Disabling AVX for now since it's not ready. -def : Proc<"corei7-avx", [FeatureSSE42, FeatureCMPXCHG16B, +def : Proc<"corei7-avx", [FeatureSSE42, FeatureCMPXCHG16B, FeaturePOPCNT, FeatureAES, FeatureCLMUL]>; // Ivy Bridge -def : Proc<"core-avx-i", [FeatureSSE42, FeatureCMPXCHG16B, +def : Proc<"core-avx-i", [FeatureSSE42, FeatureCMPXCHG16B, FeaturePOPCNT, FeatureAES, FeatureCLMUL, FeatureRDRAND, FeatureF16C, FeatureFSGSBase]>; // Haswell // FIXME: Disabling AVX/AVX2 for now since it's not ready. -def : Proc<"core-avx2", [FeatureSSE42, FeatureCMPXCHG16B, FeatureAES, - FeatureCLMUL, FeatureRDRAND, FeatureF16C, - FeatureFSGSBase, FeatureFMA3, FeatureMOVBE, - FeatureLZCNT, FeatureBMI, FeatureBMI2]>; +def : Proc<"core-avx2", [FeatureSSE42, FeatureCMPXCHG16B, FeaturePOPCNT, + FeatureAES, FeatureCLMUL, FeatureRDRAND, + FeatureF16C, FeatureFSGSBase, FeatureFMA3, + FeatureMOVBE, FeatureLZCNT, FeatureBMI, + FeatureBMI2]>; def : Proc<"k6", [FeatureMMX]>; def : Proc<"k6-2", [Feature3DNow]>; @@ -196,15 +199,15 @@ def : Proc<"athlon64-sse3", [FeatureSSE3, Feature3DNowA, FeatureCMPXCHG16B, FeatureSlowBTMem]>; def : Proc<"amdfam10", [FeatureSSE3, FeatureSSE4A, Feature3DNowA, FeatureCMPXCHG16B, FeatureLZCNT, - FeatureSlowBTMem]>; + FeaturePOPCNT, FeatureSlowBTMem]>; // FIXME: Disabling AVX for now since it's not ready. def : Proc<"bdver1", [FeatureSSE42, FeatureSSE4A, FeatureCMPXCHG16B, FeatureAES, FeatureCLMUL, FeatureFMA4, - FeatureXOP, FeatureLZCNT]>; + FeatureXOP, FeatureLZCNT, FeaturePOPCNT]>; def : Proc<"bdver2", [FeatureSSE42, FeatureSSE4A, FeatureCMPXCHG16B, FeatureAES, FeatureCLMUL, FeatureFMA4, - FeatureXOP, FeatureF16C, FeatureLZCNT, - FeatureBMI]>; + FeatureXOP, FeatureF16C, FeatureLZCNT, + FeaturePOPCNT, FeatureBMI]>; def : Proc<"winchip-c6", [FeatureMMX]>; def : Proc<"winchip2", [Feature3DNow]>; |