diff options
author | Craig Topper <craig.topper@gmail.com> | 2012-04-26 06:40:15 +0000 |
---|---|---|
committer | Craig Topper <craig.topper@gmail.com> | 2012-04-26 06:40:15 +0000 |
commit | 1203f2f138ec8298ffcf6c6138e56ce6b2413b4b (patch) | |
tree | 799591aa71cf0dbff225adb6250b0bc264373b21 /lib/Target/X86/X86.td | |
parent | 464bda3a167bb761eb3c9c178db3fa8ed26fe825 (diff) |
Enable detection of AVX and AVX2 support through CPUID. Add AVX/AVX2 to corei7-avx, core-avx-i, and core-avx2 cpu names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155618 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86.td')
-rw-r--r-- | lib/Target/X86/X86.td | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td index b6591d4419..90a724b7aa 100644 --- a/lib/Target/X86/X86.td +++ b/lib/Target/X86/X86.td @@ -173,21 +173,19 @@ def : Proc<"westmere", [FeatureSSE42, FeatureCMPXCHG16B, // Sandy Bridge // SSE is not listed here since llvm treats AVX as a reimplementation of SSE, // rather than a superset. -// FIXME: Disabling AVX for now since it's not ready. -def : Proc<"corei7-avx", [FeatureSSE42, FeatureCMPXCHG16B, FeaturePOPCNT, +def : Proc<"corei7-avx", [FeatureAVX, FeatureCMPXCHG16B, FeaturePOPCNT, FeatureAES, FeatureCLMUL]>; // Ivy Bridge -def : Proc<"core-avx-i", [FeatureSSE42, FeatureCMPXCHG16B, FeaturePOPCNT, +def : Proc<"core-avx-i", [FeatureAVX, FeatureCMPXCHG16B, FeaturePOPCNT, FeatureAES, FeatureCLMUL, FeatureRDRAND, FeatureF16C, FeatureFSGSBase]>; // Haswell -// FIXME: Disabling AVX/AVX2/FMA3 for now since it's not ready. -def : Proc<"core-avx2", [FeatureSSE42, FeatureCMPXCHG16B, FeaturePOPCNT, +def : Proc<"core-avx2", [FeatureAVX2, FeatureCMPXCHG16B, FeaturePOPCNT, FeatureAES, FeatureCLMUL, FeatureRDRAND, FeatureF16C, FeatureFSGSBase, FeatureMOVBE, FeatureLZCNT, FeatureBMI, - FeatureBMI2]>; + FeatureBMI2, FeatureFMA3]>; def : Proc<"k6", [FeatureMMX]>; def : Proc<"k6-2", [Feature3DNow]>; |