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authorChris Lattner <sabre@nondot.org>2007-03-28 17:26:52 +0000
committerChris Lattner <sabre@nondot.org>2007-03-28 17:26:52 +0000
commite9a61234ce23cc98be94bb3f6def1a5f0a0e9905 (patch)
tree1d6fb551464bc1945031f9c290704f5d8c16bdf3 /lib/Target/X86/README-X86-64.txt
parent6461bbfc50ebae663349da9a76649e05bf796800 (diff)
Dan pointed out that this is done, remove it!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35430 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/README-X86-64.txt')
-rw-r--r--lib/Target/X86/README-X86-64.txt21
1 files changed, 0 insertions, 21 deletions
diff --git a/lib/Target/X86/README-X86-64.txt b/lib/Target/X86/README-X86-64.txt
index 44c2e2894d..191904ac51 100644
--- a/lib/Target/X86/README-X86-64.txt
+++ b/lib/Target/X86/README-X86-64.txt
@@ -30,27 +30,6 @@ We need to do the tailcall optimization as well.
//===---------------------------------------------------------------------===//
-For this:
-
-int test(int a)
-{
- return a * 3;
-}
-
-We generates
- leal (%edi,%edi,2), %eax
-
-We should be generating
- leal (%rdi,%rdi,2), %eax
-
-instead. The later form does not require an address-size prefix 67H.
-
-It's probably ok to simply emit the corresponding 64-bit super class registers
-in this case?
-
-
-//===---------------------------------------------------------------------===//
-
AMD64 Optimization Manual 8.2 has some nice information about optimizing integer
multiplication by a constant. How much of it applies to Intel's X86-64
implementation? There are definite trade-offs to consider: latency vs. register