diff options
| author | Chris Lattner <sabre@nondot.org> | 2003-01-14 22:00:31 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2003-01-14 22:00:31 +0000 |
| commit | 3501feab811c86c9659248a4875fc31a3165f84d (patch) | |
| tree | 2ca1cf55d75265580653ceb51afea9d56e2c235d /lib/Target/X86/Printer.cpp | |
| parent | d640a6b4cfc563da92d47900169d848b08f27139 (diff) | |
Rename MachineInstrInfo -> TargetInstrInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5272 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/Printer.cpp')
| -rw-r--r-- | lib/Target/X86/Printer.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/X86/Printer.cpp b/lib/Target/X86/Printer.cpp index b71f3f2beb..95e8642a0d 100644 --- a/lib/Target/X86/Printer.cpp +++ b/lib/Target/X86/Printer.cpp @@ -59,7 +59,7 @@ void Printer::printConstantPool(MachineConstantPool *MCP, const TargetData &TD){ bool Printer::runOnMachineFunction(MachineFunction &MF) { static unsigned BBNumber = 0; const TargetMachine &TM = MF.getTarget(); - const MachineInstrInfo &MII = TM.getInstrInfo(); + const TargetInstrInfo &TII = TM.getInstrInfo(); // Print out constants referenced by the function printConstantPool(MF.getConstantPool(), TM.getTargetData()); @@ -80,7 +80,7 @@ bool Printer::runOnMachineFunction(MachineFunction &MF) { II != E; ++II) { // Print the assembly for the instruction. O << "\t"; - MII.print(*II, O, TM); + TII.print(*II, O, TM); } } @@ -136,7 +136,7 @@ static void printOp(std::ostream &O, const MachineOperand &MO, } } -static const std::string sizePtr(const MachineInstrDescriptor &Desc) { +static const std::string sizePtr(const TargetInstrDescriptor &Desc) { switch (Desc.TSFlags & X86II::ArgMask) { default: assert(0 && "Unknown arg size!"); case X86II::Arg8: return "BYTE PTR"; @@ -204,7 +204,7 @@ static void printMemReference(std::ostream &O, const MachineInstr *MI, void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O, const TargetMachine &TM) const { unsigned Opcode = MI->getOpcode(); - const MachineInstrDescriptor &Desc = get(Opcode); + const TargetInstrDescriptor &Desc = get(Opcode); switch (Desc.TSFlags & X86II::FormMask) { case X86II::Pseudo: |