aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/TargetSchedInfo.cpp
diff options
context:
space:
mode:
authorChris Lattner <sabre@nondot.org>2002-12-29 03:13:05 +0000
committerChris Lattner <sabre@nondot.org>2002-12-29 03:13:05 +0000
commitd0f166a4868c957041fa0ca0a35adde97aa10c91 (patch)
treedc6013e61309e7de60b71bcc744efd717d4c537c /lib/Target/TargetSchedInfo.cpp
parentf27eeea54fb0176986f76731c499176345047dff (diff)
More renamings of Target/Machine*Info to Target/Target*Info
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5204 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/TargetSchedInfo.cpp')
-rw-r--r--lib/Target/TargetSchedInfo.cpp24
1 files changed, 12 insertions, 12 deletions
diff --git a/lib/Target/TargetSchedInfo.cpp b/lib/Target/TargetSchedInfo.cpp
index 185f01ec9e..d64652398a 100644
--- a/lib/Target/TargetSchedInfo.cpp
+++ b/lib/Target/TargetSchedInfo.cpp
@@ -5,7 +5,7 @@
//
//===----------------------------------------------------------------------===//
-#include "llvm/Target/MachineSchedInfo.h"
+#include "llvm/Target/TargetSchedInfo.h"
#include "llvm/Target/TargetMachine.h"
resourceId_t MachineResource::nextId = 0;
@@ -69,17 +69,17 @@ ComputeMinGap(const InstrRUsage &fromRU,
//---------------------------------------------------------------------------
-// class MachineSchedInfo
+// class TargetSchedInfo
// Interface to machine description for instruction scheduling
//---------------------------------------------------------------------------
-MachineSchedInfo::MachineSchedInfo(const TargetMachine& tgt,
- int NumSchedClasses,
- const InstrClassRUsage* ClassRUsages,
- const InstrRUsageDelta* UsageDeltas,
- const InstrIssueDelta* IssueDeltas,
- unsigned int NumUsageDeltas,
- unsigned int NumIssueDeltas)
+TargetSchedInfo::TargetSchedInfo(const TargetMachine& tgt,
+ int NumSchedClasses,
+ const InstrClassRUsage* ClassRUsages,
+ const InstrRUsageDelta* UsageDeltas,
+ const InstrIssueDelta* IssueDeltas,
+ unsigned NumUsageDeltas,
+ unsigned NumIssueDeltas)
: target(tgt),
numSchedClasses(NumSchedClasses), mii(& tgt.getInstrInfo()),
classRUsages(ClassRUsages), usageDeltas(UsageDeltas),
@@ -88,7 +88,7 @@ MachineSchedInfo::MachineSchedInfo(const TargetMachine& tgt,
{}
void
-MachineSchedInfo::initializeResources()
+TargetSchedInfo::initializeResources()
{
assert(MAX_NUM_SLOTS >= (int)getMaxNumIssueTotal()
&& "Insufficient slots for static data! Increase MAX_NUM_SLOTS");
@@ -111,7 +111,7 @@ MachineSchedInfo::initializeResources()
void
-MachineSchedInfo::computeInstrResources(const std::vector<InstrRUsage>&
+TargetSchedInfo::computeInstrResources(const std::vector<InstrRUsage>&
instrRUForClasses)
{
int numOpCodes = mii->getNumRealOpCodes();
@@ -141,7 +141,7 @@ MachineSchedInfo::computeInstrResources(const std::vector<InstrRUsage>&
void
-MachineSchedInfo::computeIssueGaps(const std::vector<InstrRUsage>&
+TargetSchedInfo::computeIssueGaps(const std::vector<InstrRUsage>&
instrRUForClasses)
{
int numOpCodes = mii->getNumRealOpCodes();