diff options
author | Chris Lattner <sabre@nondot.org> | 2006-05-04 17:52:23 +0000 |
---|---|---|
committer | Chris Lattner <sabre@nondot.org> | 2006-05-04 17:52:23 +0000 |
commit | e53f4a055f74bded20d6129b4724ddd17fd199f6 (patch) | |
tree | 298e99166cc5b20f68b64050b71a6d3dcf21f4ad /lib/Target/Sparc | |
parent | e3158308e0d51ce5c2624529e85c9a6be8f5ff46 (diff) |
Move some methods out of MachineInstr into MachineOperand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28102 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc')
-rw-r--r-- | lib/Target/Sparc/FPMover.cpp | 4 | ||||
-rw-r--r-- | lib/Target/Sparc/SparcRegisterInfo.cpp | 9 |
2 files changed, 6 insertions, 7 deletions
diff --git a/lib/Target/Sparc/FPMover.cpp b/lib/Target/Sparc/FPMover.cpp index 70f203ccca..7073260c4a 100644 --- a/lib/Target/Sparc/FPMover.cpp +++ b/lib/Target/Sparc/FPMover.cpp @@ -104,8 +104,8 @@ bool FPMover::runOnMachineBasicBlock(MachineBasicBlock &MBB) { else assert(0 && "Unknown opcode!"); - MI->SetMachineOperandReg(0, EvenDestReg); - MI->SetMachineOperandReg(1, EvenSrcReg); + MI->getOperand(0).setReg(EvenDestReg); + MI->getOperand(1).setReg(EvenSrcReg); DEBUG(std::cerr << "FPMover: the modified instr is: " << *MI); // Insert copy for the other half of the double. if (DestDReg != SrcDReg) { diff --git a/lib/Target/Sparc/SparcRegisterInfo.cpp b/lib/Target/Sparc/SparcRegisterInfo.cpp index d72ca74516..88cbc9c769 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.cpp +++ b/lib/Target/Sparc/SparcRegisterInfo.cpp @@ -135,8 +135,8 @@ SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const { if (Offset >= -4096 && Offset <= 4095) { // If the offset is small enough to fit in the immediate field, directly // encode it. - MI.SetMachineOperandReg(i, SP::I6); - MI.SetMachineOperandConst(i+1, MachineOperand::MO_Immediate, Offset); + MI.getOperand(i).ChangeToRegister(SP::I6); + MI.getOperand(i+1).ChangeToImmediate(Offset); } else { // Otherwise, emit a G1 = SETHI %hi(offset). FIXME: it would be better to // scavenge a register here instead of reserving G1 all of the time. @@ -146,9 +146,8 @@ SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const { BuildMI(*MI.getParent(), II, SP::ADDrr, 2, SP::G1).addReg(SP::G1).addReg(SP::I6); // Insert: G1+%lo(offset) into the user. - MI.SetMachineOperandReg(i, SP::G1); - MI.SetMachineOperandConst(i+1, MachineOperand::MO_Immediate, - Offset & ((1 << 10)-1)); + MI.getOperand(i).ChangeToRegister(SP::G1); + MI.getOperand(i+1).ChangeToImmediate(Offset & ((1 << 10)-1)); } } |