diff options
| author | Chris Lattner <sabre@nondot.org> | 2005-09-30 01:29:42 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-09-30 01:29:42 +0000 |
| commit | 97d5e6461a28790fa341d9e3b58f043db549dc6a (patch) | |
| tree | 00293d7848486e66ce181981b28822b890fc744a /lib/Target/Sparc | |
| parent | bf9716b9c48d3b0370c715cd79540945f73dc296 (diff) | |
Pass extra regclasses into spilling code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23537 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc')
| -rw-r--r-- | lib/Target/Sparc/SparcRegisterInfo.cpp | 6 | ||||
| -rw-r--r-- | lib/Target/Sparc/SparcRegisterInfo.h | 6 |
2 files changed, 8 insertions, 4 deletions
diff --git a/lib/Target/Sparc/SparcRegisterInfo.cpp b/lib/Target/Sparc/SparcRegisterInfo.cpp index de3fc8052f..af8605a682 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.cpp +++ b/lib/Target/Sparc/SparcRegisterInfo.cpp @@ -40,7 +40,8 @@ static const TargetRegisterClass *getClass(unsigned SrcReg) { void SparcV8RegisterInfo:: storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, - unsigned SrcReg, int FrameIdx) const { + unsigned SrcReg, int FrameIdx, + const TargetRegisterClass *rc) const { const TargetRegisterClass *RC = getClass(SrcReg); // On the order of operands here: think "[FrameIdx + 0] = SrcReg". @@ -59,7 +60,8 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, void SparcV8RegisterInfo:: loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, - unsigned DestReg, int FrameIdx) const { + unsigned DestReg, int FrameIdx, + const TargetRegisterClass *rc) const { const TargetRegisterClass *RC = getClass(DestReg); if (RC == V8::IntRegsRegisterClass) BuildMI (MBB, I, V8::LD, 2, DestReg).addFrameIndex (FrameIdx).addSImm (0); diff --git a/lib/Target/Sparc/SparcRegisterInfo.h b/lib/Target/Sparc/SparcRegisterInfo.h index 851bd8038a..09ce548a8b 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.h +++ b/lib/Target/Sparc/SparcRegisterInfo.h @@ -28,11 +28,13 @@ struct SparcV8RegisterInfo : public SparcV8GenRegisterInfo { /// Code Generation virtual methods... void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, - unsigned SrcReg, int FrameIndex) const; + unsigned SrcReg, int FrameIndex, + const TargetRegisterClass *RC) const; void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, - unsigned DestReg, int FrameIndex) const; + unsigned DestReg, int FrameIndex, + const TargetRegisterClass *RC) const; void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, unsigned SrcReg, |