diff options
| author | Brian Gaeke <gaeke@uiuc.edu> | 2004-04-07 04:29:14 +0000 |
|---|---|---|
| committer | Brian Gaeke <gaeke@uiuc.edu> | 2004-04-07 04:29:14 +0000 |
| commit | 88ddd4a07de81a14a6c768fe5ac4c6a7481f838d (patch) | |
| tree | e5ef8fcc79c7be2cd1329cb0c6484bc854010eaf /lib/Target/Sparc | |
| parent | fa4bb09cf042dc0f30297082f55bc37f35c0f5f5 (diff) | |
Make generation of stack-slot loads and copies less ugly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12742 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc')
| -rw-r--r-- | lib/Target/Sparc/SparcRegisterInfo.cpp | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/lib/Target/Sparc/SparcRegisterInfo.cpp b/lib/Target/Sparc/SparcRegisterInfo.cpp index 5ca69e0551..c377612e64 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.cpp +++ b/lib/Target/Sparc/SparcRegisterInfo.cpp @@ -40,26 +40,23 @@ int SparcV8RegisterInfo::storeRegToStackSlot( int SparcV8RegisterInfo::loadRegFromStackSlot( MachineBasicBlock &MBB, - MachineBasicBlock::iterator MBBI, + MachineBasicBlock::iterator I, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC) const { assert (RC == SparcV8::IntRegsRegisterClass && "Can only load 32-bit registers from stack slots"); - MachineInstr *I = - BuildMI (V8::LDmr, 2).addReg (DestReg).addFrameIndex (FrameIdx).addSImm (0); - MBB.insert(MBBI, I); + BuildMI (MBB, I, V8::LDmr, 2, DestReg).addFrameIndex (FrameIdx).addSImm (0); return 1; } int SparcV8RegisterInfo::copyRegToReg(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MBBI, + MachineBasicBlock::iterator I, unsigned DestReg, unsigned SrcReg, const TargetRegisterClass *RC) const { assert (RC == SparcV8::IntRegsRegisterClass && "Can only copy 32-bit registers"); - MBB.insert (MBBI, - BuildMI (V8::ORrr, 3, DestReg).addReg (V8::G0).addReg (SrcReg)); + BuildMI (MBB, I, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg); return -1; } |