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authorEvan Cheng <evan.cheng@apple.com>2006-11-13 23:36:35 +0000
committerEvan Cheng <evan.cheng@apple.com>2006-11-13 23:36:35 +0000
commit7ce45783531cfa81bfd7be561ea7e4738e8c6ca8 (patch)
tree459ce71956b931173c43b156295d14e18f4748fc /lib/Target/Sparc
parentd7de496b23fca8145f777a56281457bf64e8bbad (diff)
Matches MachineInstr changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31712 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc')
-rw-r--r--lib/Target/Sparc/SparcInstrInfo.cpp2
-rw-r--r--lib/Target/Sparc/SparcRegisterInfo.cpp13
-rw-r--r--lib/Target/Sparc/SparcRegisterInfo.h3
3 files changed, 10 insertions, 8 deletions
diff --git a/lib/Target/Sparc/SparcInstrInfo.cpp b/lib/Target/Sparc/SparcInstrInfo.cpp
index 0a982fff31..23f2e42a8c 100644
--- a/lib/Target/Sparc/SparcInstrInfo.cpp
+++ b/lib/Target/Sparc/SparcInstrInfo.cpp
@@ -19,7 +19,7 @@ using namespace llvm;
SparcInstrInfo::SparcInstrInfo(SparcSubtarget &ST)
: TargetInstrInfo(SparcInsts, sizeof(SparcInsts)/sizeof(SparcInsts[0])),
- RI(ST) {
+ RI(ST, *this) {
}
static bool isZeroImm(const MachineOperand &op) {
diff --git a/lib/Target/Sparc/SparcRegisterInfo.cpp b/lib/Target/Sparc/SparcRegisterInfo.cpp
index 81ebdba3f2..bd2da73c6e 100644
--- a/lib/Target/Sparc/SparcRegisterInfo.cpp
+++ b/lib/Target/Sparc/SparcRegisterInfo.cpp
@@ -23,9 +23,10 @@
#include <iostream>
using namespace llvm;
-SparcRegisterInfo::SparcRegisterInfo(SparcSubtarget &st)
+SparcRegisterInfo::SparcRegisterInfo(SparcSubtarget &st,
+ const TargetInstrInfo &tii)
: SparcGenRegisterInfo(SP::ADJCALLSTACKDOWN, SP::ADJCALLSTACKUP),
- Subtarget(st) {
+ Subtarget(st), TII(tii) {
}
void SparcRegisterInfo::
@@ -81,10 +82,10 @@ MachineInstr *SparcRegisterInfo::foldMemoryOperand(MachineInstr* MI,
if (MI->getOperand(1).isRegister() && MI->getOperand(1).getReg() == SP::G0&&
MI->getOperand(0).isRegister() && MI->getOperand(2).isRegister()) {
if (OpNum == 0) // COPY -> STORE
- return BuildMI(SP::STri, 3).addFrameIndex(FI).addImm(0)
+ return BuildMI(TII, SP::STri, 3).addFrameIndex(FI).addImm(0)
.addReg(MI->getOperand(2).getReg());
else // COPY -> LOAD
- return BuildMI(SP::LDri, 2, MI->getOperand(0).getReg())
+ return BuildMI(TII, SP::LDri, 2, MI->getOperand(0).getReg())
.addFrameIndex(FI).addImm(0);
}
break;
@@ -93,10 +94,10 @@ MachineInstr *SparcRegisterInfo::foldMemoryOperand(MachineInstr* MI,
// FALLTHROUGH
case SP::FMOVD:
if (OpNum == 0) // COPY -> STORE
- return BuildMI(isFloat ? SP::STFri : SP::STDFri, 3)
+ return BuildMI(TII, isFloat ? SP::STFri : SP::STDFri, 3)
.addFrameIndex(FI).addImm(0).addReg(MI->getOperand(1).getReg());
else // COPY -> LOAD
- return BuildMI(isFloat ? SP::LDFri : SP::LDDFri, 2,
+ return BuildMI(TII, isFloat ? SP::LDFri : SP::LDDFri, 2,
MI->getOperand(0).getReg()).addFrameIndex(FI).addImm(0);
break;
}
diff --git a/lib/Target/Sparc/SparcRegisterInfo.h b/lib/Target/Sparc/SparcRegisterInfo.h
index bbb11f86de..d83060b644 100644
--- a/lib/Target/Sparc/SparcRegisterInfo.h
+++ b/lib/Target/Sparc/SparcRegisterInfo.h
@@ -24,8 +24,9 @@ class Type;
struct SparcRegisterInfo : public SparcGenRegisterInfo {
SparcSubtarget &Subtarget;
+ const TargetInstrInfo &TII;
- SparcRegisterInfo(SparcSubtarget &st);
+ SparcRegisterInfo(SparcSubtarget &st, const TargetInstrInfo &tii);
/// Code Generation virtual methods...
void storeRegToStackSlot(MachineBasicBlock &MBB,