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authorChris Lattner <sabre@nondot.org>2005-12-19 01:39:40 +0000
committerChris Lattner <sabre@nondot.org>2005-12-19 01:39:40 +0000
commit61772c20ee51c7d244320f2b0b5a4d91f19de6b0 (patch)
tree2995a25bb744e39968454aafe17f7321bba39711 /lib/Target/Sparc
parent7e1cf1c8f456a82de9f68c1727a94e1202a927a0 (diff)
mark some unsupported ops as unsupported
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24852 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc')
-rw-r--r--lib/Target/Sparc/SparcISelDAGToDAG.cpp11
1 files changed, 11 insertions, 0 deletions
diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index 2b4cf73135..069b542264 100644
--- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -136,6 +136,17 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM)
setOperationAction(ISD::MEMSET, MVT::Other, Expand);
setOperationAction(ISD::MEMCPY, MVT::Other, Expand);
+ setOperationAction(ISD::FSIN , MVT::f64, Expand);
+ setOperationAction(ISD::FCOS , MVT::f64, Expand);
+ setOperationAction(ISD::FSIN , MVT::f32, Expand);
+ setOperationAction(ISD::FCOS , MVT::f32, Expand);
+ setOperationAction(ISD::CTPOP, MVT::i32, Expand);
+ setOperationAction(ISD::CTTZ , MVT::i32, Expand);
+ setOperationAction(ISD::CTLZ , MVT::i32, Expand);
+
+ setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
+ setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);
+ setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand);
computeRegisterProperties();
}