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authorChris Lattner <sabre@nondot.org>2006-02-09 05:06:36 +0000
committerChris Lattner <sabre@nondot.org>2006-02-09 05:06:36 +0000
commit9413678f91f4789902b69c4dc18b7205e95b0224 (patch)
tree52f02b8a5aa1005b185a81cee174e4a16c7e629c /lib/Target/Sparc/SparcTargetMachine.cpp
parent239862ce995adfd3b51062e62e54ef2db92b1150 (diff)
add an option to turn on LSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26080 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/SparcTargetMachine.cpp')
-rw-r--r--lib/Target/Sparc/SparcTargetMachine.cpp7
1 files changed, 6 insertions, 1 deletions
diff --git a/lib/Target/Sparc/SparcTargetMachine.cpp b/lib/Target/Sparc/SparcTargetMachine.cpp
index 2a2e9b4758..b66ed02c16 100644
--- a/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -27,6 +27,8 @@ using namespace llvm;
namespace {
// Register the target.
RegisterTarget<SparcTargetMachine> X("sparc", " SPARC");
+
+ cl::opt<bool> EnableLSR("enable-sparc-lsr", cl::Hidden);
}
/// SparcTargetMachine ctor - Create an ILP32 architecture model
@@ -65,6 +67,9 @@ bool SparcTargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
bool Fast) {
if (FileType != TargetMachine::AssemblyFile) return true;
+ // Run loop strength reduction before anything else.
+ if (EnableLSR && !Fast) PM.add(createLoopStrengthReducePass());
+
// FIXME: Implement efficient support for garbage collection intrinsics.
PM.add(createLowerGCPass());
@@ -73,7 +78,7 @@ bool SparcTargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
// FIXME: implement the switch instruction in the instruction selector.
PM.add(createLowerSwitchPass());
-
+
// Print LLVM code input to instruction selector:
if (PrintMachineCode)
PM.add(new PrintFunctionPass());