Switch Sparc to new section handling stuff. Refactor printing of module-level GVs significantly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54450 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 21 insertions, 1 deletions

diff --git a/lib/Target/Sparc/SparcTargetAsmInfo.cpp b/lib/Target/Sparc/SparcTargetAsmInfo.cpp
index a2be52f189..5fd99ed003 100644
--- a/lib/Target/Sparc/SparcTargetAsmInfo.cpp
+++ b/lib/Target/Sparc/SparcTargetAsmInfo.cpp
@@ -15,11 +15,31 @@
 
 using namespace llvm;
 
-SparcTargetAsmInfo::SparcTargetAsmInfo(const SparcTargetMachine &TM) {
+SparcELFTargetAsmInfo::SparcELFTargetAsmInfo(const TargetMachine &TM):
+  ELFTargetAsmInfo(TM) {
   Data16bitsDirective = "\t.half\t";
   Data32bitsDirective = "\t.word\t";
   Data64bitsDirective = 0;  // .xword is only supported by V9.
   ZeroDirective = "\t.skip\t";
   CommentString = "!";
   ConstantPoolSection = "\t.section \".rodata\",#alloc\n";
+  COMMDirectiveTakesAlignment = true;
+}
+
+std::string SparcELFTargetAsmInfo::PrintSectionFlags(unsigned flags) const {
+  std::string Flags = ",";
+
+  if (flags & SectionFlags::Mergeable)
+    return ELFTargetAsmInfo::PrintSectionFlags(flags);
+
+  if (!(flags & SectionFlags::Debug))
+    Flags += "#alloc";
+  if (flags & SectionFlags::Code)
+    Flags += "#execinstr";
+  if (flags & SectionFlags::Writeable)
+    Flags += "#write";
+  if (flags & SectionFlags::TLS)
+    Flags += "#tls";
+
+  return Flags;
 }