diff options
| author | Christian Konig <christian.koenig@amd.com> | 2013-02-16 11:28:22 +0000 |
|---|---|---|
| committer | Christian Konig <christian.koenig@amd.com> | 2013-02-16 11:28:22 +0000 |
| commit | e25e490793241e471036c3e2f969ce6a068e5ce1 (patch) | |
| tree | 3a45cc748382fb881432d9993e1e03e5ce28514d /lib/Target/R600/SILowerControlFlow.cpp | |
| parent | 8e4eebcecf291386a321d0f8582b8a57841ea8c9 (diff) | |
R600/SI: cleanup literal handling v3
Seems to be allot simpler, and also paves the
way for further improvements.
v2: rebased on master, use 0 in BUFFER_LOAD_FORMAT_XYZW,
use VGPR0 in dummy EXP, avoid compiler warning, break
after encoding the first literal.
v3: correctly use V_ADD_F32_e64
This is a candidate for the stable branch.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175354 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/SILowerControlFlow.cpp')
| -rw-r--r-- | lib/Target/R600/SILowerControlFlow.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/lib/Target/R600/SILowerControlFlow.cpp b/lib/Target/R600/SILowerControlFlow.cpp index 1b0dbcc45f..b215aa22db 100644 --- a/lib/Target/R600/SILowerControlFlow.cpp +++ b/lib/Target/R600/SILowerControlFlow.cpp @@ -158,10 +158,10 @@ void SILowerControlFlowPass::SkipIfDead(MachineInstr &MI) { .addImm(0) .addImm(1) .addImm(1) - .addReg(AMDGPU::SREG_LIT_0) - .addReg(AMDGPU::SREG_LIT_0) - .addReg(AMDGPU::SREG_LIT_0) - .addReg(AMDGPU::SREG_LIT_0); + .addReg(AMDGPU::VGPR0) + .addReg(AMDGPU::VGPR0) + .addReg(AMDGPU::VGPR0) + .addReg(AMDGPU::VGPR0); // ... and terminate wavefront BuildMI(MBB, Insert, DL, TII->get(AMDGPU::S_ENDPGM)); @@ -296,7 +296,7 @@ void SILowerControlFlowPass::Kill(MachineInstr &MI) { // Clear this pixel from the exec mask if the operand is negative BuildMI(MBB, &MI, DL, TII->get(AMDGPU::V_CMPX_LE_F32_e32), AMDGPU::VCC) - .addReg(AMDGPU::SREG_LIT_0) + .addImm(0) .addOperand(MI.getOperand(0)); MI.eraseFromParent(); |