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authorChris Lattner <sabre@nondot.org>2005-08-17 19:33:30 +0000
committerChris Lattner <sabre@nondot.org>2005-08-17 19:33:30 +0000
commit8482dd894d7d64134f999d8e62bc9adf5cb239a9 (patch)
tree9ddd39721e1204ad9f87a6ed32a05a5bad746ccd /lib/Target/PowerPC/PPCTargetMachine.cpp
parenta5a91b10262f5bbcf1ec8abd1e66ee6585d3f00e (diff)
add a beta option for turning on dag->dag isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22837 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCTargetMachine.cpp')
-rw-r--r--lib/Target/PowerPC/PPCTargetMachine.cpp12
1 files changed, 9 insertions, 3 deletions
diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp
index e1f29ba519..18c7fdc904 100644
--- a/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -30,8 +30,11 @@
using namespace llvm;
namespace {
- const std::string PPC32ID = "PowerPC/32bit";
+ const char *PPC32ID = "PowerPC/32bit";
+ static cl::opt<bool> EnablePPCDAGDAG("enable-ppc-dag-isel", cl::Hidden,
+ cl::desc("Enable DAG-to-DAG isel for PPC (beta)"));
+
// Register the targets
RegisterTarget<PPC32TargetMachine>
X("ppc32", " PowerPC 32-bit");
@@ -81,8 +84,11 @@ bool PowerPCTargetMachine::addPassesToEmitFile(PassManager &PM,
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
- // Default to pattern ISel
- if (PatternISelTriState == 0) {
+ // Install an instruction selector.
+ if (EnablePPCDAGDAG) {
+ PM.add(createPPC32ISelDag(*this));
+
+ } else if (PatternISelTriState == 0) {
PM.add(createLowerConstantExpressionsPass());
PM.add(createPPC32ISelSimple(*this));
} else