diff options
| author | Nate Begeman <natebegeman@mac.com> | 2005-07-21 20:44:43 +0000 |
|---|---|---|
| committer | Nate Begeman <natebegeman@mac.com> | 2005-07-21 20:44:43 +0000 |
| commit | 2497e6391f8df05926fe17b5cf08dad61c4797d2 (patch) | |
| tree | fcd77e313058c02770557562cfd34229137702bc /lib/Target/PowerPC/PPCTargetMachine.cpp | |
| parent | 2130c0893041718f6d5c2bf3df4ba0ddce9adb08 (diff) | |
Support building non-PIC
Remove the LoadHiAddr pseudo-instruction.
Optimization of stores to and loads from statics.
Force JIT to use new non-PIC codepaths.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22494 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCTargetMachine.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCTargetMachine.cpp | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp index d2a9781d5d..74acf45fe9 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -29,6 +29,8 @@ #include <iostream> using namespace llvm; +bool llvm::GPOPT = false; + namespace llvm { cl::opt<bool> AIX("aix", cl::desc("Generate AIX/xcoff instead of Darwin/MachO"), @@ -36,6 +38,9 @@ namespace llvm { cl::opt<bool> EnablePPCLSR("enable-lsr-for-ppc", cl::desc("Enable LSR for PPC (beta)"), cl::Hidden); + cl::opt<bool, true> EnableGPOPT("enable-gpopt", cl::Hidden, + cl::location(GPOPT), + cl::desc("Enable optimizations for GP cpus")); } namespace { @@ -127,8 +132,11 @@ bool PowerPCTargetMachine::addPassesToEmitFile(PassManager &PM, } void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) { - bool LP64 = (0 != dynamic_cast<PPC64TargetMachine *>(&TM)); + // The JIT does not support or need PIC. + PICEnabled = false; + bool LP64 = (0 != dynamic_cast<PPC64TargetMachine *>(&TM)); + if (EnablePPCLSR) { PM.add(createLoopStrengthReducePass()); PM.add(createCFGSimplificationPass()); @@ -170,7 +178,7 @@ void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) { /// PPC32TargetMachine::PPC32TargetMachine(const Module &M, IntrinsicLowering *IL) : PowerPCTargetMachine(PPC32ID, IL, - TargetData(PPC32ID,false,4,4,8,4,4,4,2,1,1), + TargetData(PPC32ID,false,4,4,4,4,4,4,2,1,1), PowerPCFrameInfo(*this, false)), JITInfo(*this) {} /// PPC64TargetMachine ctor - Create a LP64 architecture model |