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authorDaniel Dunbar <daniel@zuster.org>2009-08-11 22:17:52 +0000
committerDaniel Dunbar <daniel@zuster.org>2009-08-11 22:17:52 +0000
commit7417b761c2d88335bd77d38911ff8d323fc4a4f2 (patch)
treed64cf357fa8379447be1c46ed69fc7f509ae2316 /lib/Target/PowerPC/PPCSubtarget.cpp
parentb6ba9c36dbc54c85b86b29d9491c457b4de8b60c (diff)
Add 'isCodeGenOnly' bit to Instruction .td records.
- Used to mark fake instructions which don't correspond to an actual machine instruction (or are duplicates of a real instruction). This is to be used for "special cases" in the .td files, which should be ignored by things like the assembler and disassembler. We still need a good solution to handle pervasive duplication, like with the Int_ instructions. - Set the bit on fake "mov 0" style instructions, which allows turning an assembler matcher warning into a hard error. - -2 FIXMEs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78731 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCSubtarget.cpp')
0 files changed, 0 insertions, 0 deletions