diff options
| author | Hal Finkel <hfinkel@anl.gov> | 2013-03-26 20:08:20 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-03-26 20:08:20 +0000 |
| commit | aa6047d23d8ed55abd8545f5cbe82cd13cbd756a (patch) | |
| tree | c358e1a210147737d619c62e68893226f82330a4 /lib/Target/PowerPC/PPCRegisterInfo.cpp | |
| parent | 4d419bffb7ca0c04063afc0fd12ef7b7ced17658 (diff) | |
PPC: Use HWEncoding and TRI->getEncodingValue
As pointed out by Jakob, we don't need to maintain a separate
register-numbering table. Instead we should let TableGen generate the table for
us from the information (already present) in PPCRegisterInfo.td.
TRI->getEncodingValue is now used to access register-encoding values.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178067 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCRegisterInfo.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCRegisterInfo.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp index 1fa0f67137..d5a307e228 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -328,7 +328,7 @@ void PPCRegisterInfo::lowerCRSpilling(MachineBasicBlock::iterator II, // rlwinm rA, rA, ShiftBits, 0, 31. BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::RLWINM8 : PPC::RLWINM), Reg) .addReg(Reg1, RegState::Kill) - .addImm(getPPCRegisterNumbering(SrcReg) * 4) + .addImm(getEncodingValue(SrcReg) * 4) .addImm(0) .addImm(31); } @@ -368,7 +368,7 @@ void PPCRegisterInfo::lowerCRRestore(MachineBasicBlock::iterator II, unsigned Reg1 = Reg; Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); - unsigned ShiftBits = getPPCRegisterNumbering(DestReg)*4; + unsigned ShiftBits = getEncodingValue(DestReg)*4; // rlwinm r11, r11, 32-ShiftBits, 0, 31. BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::RLWINM8 : PPC::RLWINM), Reg) .addReg(Reg1, RegState::Kill).addImm(32-ShiftBits).addImm(0) |