diff options
| author | Chris Lattner <sabre@nondot.org> | 2008-03-20 01:22:40 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2008-03-20 01:22:40 +0000 |
| commit | 71a2cb25ebc818383dd0f80475bc166f834e8d99 (patch) | |
| tree | 71ce398f1562f30d3622fe18e0b22223406927e1 /lib/Target/PowerPC/PPCRegisterInfo.cpp | |
| parent | bed7e6849823042c442e7e88dba5d41f68982815 (diff) | |
detabify llvm, patch by Mike Stump!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48577 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCRegisterInfo.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCRegisterInfo.cpp | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp index 0970ef6627..d78abaca7c 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -483,12 +483,12 @@ void PPCRegisterInfo::lowerDynamicAlloc(MachineBasicBlock::iterator II, } else if (LP64) { if (EnableRegisterScavenging) // FIXME (64-bit): Use "true" part. BuildMI(MBB, II, TII.get(PPC::LD), Reg) - .addImm(0) - .addReg(PPC::X1); + .addImm(0) + .addReg(PPC::X1); else BuildMI(MBB, II, TII.get(PPC::LD), PPC::X0) - .addImm(0) - .addReg(PPC::X1); + .addImm(0) + .addReg(PPC::X1); } else { BuildMI(MBB, II, TII.get(PPC::LWZ), Reg) .addImm(0) @@ -500,25 +500,25 @@ void PPCRegisterInfo::lowerDynamicAlloc(MachineBasicBlock::iterator II, if (LP64) { if (EnableRegisterScavenging) // FIXME (64-bit): Use "true" part. BuildMI(MBB, II, TII.get(PPC::STDUX)) - .addReg(Reg, false, false, true) - .addReg(PPC::X1) - .addReg(MI.getOperand(1).getReg()); + .addReg(Reg, false, false, true) + .addReg(PPC::X1) + .addReg(MI.getOperand(1).getReg()); else BuildMI(MBB, II, TII.get(PPC::STDUX)) - .addReg(PPC::X0, false, false, true) - .addReg(PPC::X1) - .addReg(MI.getOperand(1).getReg()); + .addReg(PPC::X0, false, false, true) + .addReg(PPC::X1) + .addReg(MI.getOperand(1).getReg()); if (!MI.getOperand(1).isKill()) BuildMI(MBB, II, TII.get(PPC::ADDI8), MI.getOperand(0).getReg()) - .addReg(PPC::X1) - .addImm(maxCallFrameSize); + .addReg(PPC::X1) + .addImm(maxCallFrameSize); else // Implicitly kill the register. BuildMI(MBB, II, TII.get(PPC::ADDI8), MI.getOperand(0).getReg()) - .addReg(PPC::X1) - .addImm(maxCallFrameSize) - .addReg(MI.getOperand(1).getReg(), false, true, true); + .addReg(PPC::X1) + .addImm(maxCallFrameSize) + .addReg(MI.getOperand(1).getReg(), false, true, true); } else { BuildMI(MBB, II, TII.get(PPC::STWUX)) .addReg(Reg, false, false, true) @@ -527,14 +527,14 @@ void PPCRegisterInfo::lowerDynamicAlloc(MachineBasicBlock::iterator II, if (!MI.getOperand(1).isKill()) BuildMI(MBB, II, TII.get(PPC::ADDI), MI.getOperand(0).getReg()) - .addReg(PPC::R1) - .addImm(maxCallFrameSize); + .addReg(PPC::R1) + .addImm(maxCallFrameSize); else // Implicitly kill the register. BuildMI(MBB, II, TII.get(PPC::ADDI), MI.getOperand(0).getReg()) - .addReg(PPC::R1) - .addImm(maxCallFrameSize) - .addReg(MI.getOperand(1).getReg(), false, true, true); + .addReg(PPC::R1) + .addImm(maxCallFrameSize) + .addReg(MI.getOperand(1).getReg(), false, true, true); } // Discard the DYNALLOC instruction. @@ -945,7 +945,7 @@ PPCRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; const TargetRegisterClass *RC = IsPPC64 ? G8RC : GPRC; RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(), - RC->getAlignment())); + RC->getAlignment())); } } |