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authorEvan Cheng <evan.cheng@apple.com>2008-07-12 02:23:19 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-07-12 02:23:19 +0000
commit5330192ab59d65f285799ff5a9acd67d27417a56 (patch)
treec1f082236f9b3126ad9e73c310bd5ab8c9db7d4a /lib/Target/PowerPC/PPCISelLowering.h
parentb9890ae3c35ad7d8e49261650d5b98f49f97a705 (diff)
Implement llvm.atomic.cmp.swap.i32 on PPC. Patch by Gary Benson!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53505 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.h')
-rw-r--r--lib/Target/PowerPC/PPCISelLowering.h13
1 files changed, 5 insertions, 8 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.h b/lib/Target/PowerPC/PPCISelLowering.h
index a620f414f2..7f6d445db6 100644
--- a/lib/Target/PowerPC/PPCISelLowering.h
+++ b/lib/Target/PowerPC/PPCISelLowering.h
@@ -152,6 +152,11 @@ namespace llvm {
/// MTFSF = F8RC, INFLAG - This moves the register into the FPSCR.
MTFSF,
+ /// ATOMIC_LOAD_ADD, ATOMIC_CMP_SWAP, ATOMIC_SWAP - These
+ /// correspond to the llvm.atomic.load.add, llvm.atomic.cmp.swap
+ /// and llvm.atomic.swap intrinsics.
+ ATOMIC_LOAD_ADD, ATOMIC_CMP_SWAP, ATOMIC_SWAP,
+
/// LARX = This corresponds to PPC l{w|d}arx instrcution: load and
/// reserve indexed. This is used to implement atomic operations.
LARX,
@@ -160,10 +165,6 @@ namespace llvm {
/// indexed. This is used to implement atomic operations.
STCX,
- /// CMP_UNRESERVE = Test for equality and "unreserve" if not true. This
- /// is used to implement atomic operations.
- CMP_UNRESERVE,
-
/// TAILCALL - Indicates a tail call should be taken.
TAILCALL,
/// TC_RETURN - A tail call return.
@@ -325,10 +326,6 @@ namespace llvm {
SelectionDAG &DAG) const;
private:
- /// PPCAtomicLabelIndex - Keep track the number of PPC atomic labels.
- ///
- unsigned PPCAtomicLabelIndex;
-
SDOperand getFramePointerFrameIndex(SelectionDAG & DAG) const;
SDOperand getReturnAddrFrameIndex(SelectionDAG & DAG) const;