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| author | Dan Gohman <gohman@apple.com> | 2007-10-11 23:21:31 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2007-10-11 23:21:31 +0000 |
| commit | f96e4de403453e57aea75bcac1ed99af686d33c4 (patch) | |
| tree | dc5aeaacda4f5d8534e7a2c3d320894102fae104 /lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | e54be104180d81b61c5fcc29ccb7960f9b78476e (diff) | |
Set ISD::FPOW to Expand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42881 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 4a206653d5..ca1982fe6e 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -101,13 +101,15 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) setOperationAction(ISD::UDIVREM, MVT::i64, Expand); setOperationAction(ISD::SDIVREM, MVT::i64, Expand); - // We don't support sin/cos/sqrt/fmod + // We don't support sin/cos/sqrt/fmod/pow setOperationAction(ISD::FSIN , MVT::f64, Expand); setOperationAction(ISD::FCOS , MVT::f64, Expand); setOperationAction(ISD::FREM , MVT::f64, Expand); + setOperationAction(ISD::FPOW , MVT::f64, Expand); setOperationAction(ISD::FSIN , MVT::f32, Expand); setOperationAction(ISD::FCOS , MVT::f32, Expand); setOperationAction(ISD::FREM , MVT::f32, Expand); + setOperationAction(ISD::FPOW , MVT::f32, Expand); // If we're enabling GP optimizations, use hardware square root if (!TM.getSubtarget<PPCSubtarget>().hasFSQRT()) { |