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authorDuncan Sands <baldrick@free.fr>2008-07-21 10:20:31 +0000
committerDuncan Sands <baldrick@free.fr>2008-07-21 10:20:31 +0000
commitd038e04188047eca4749d025ef1f05f7ae660bca (patch)
treed325f4f744978ef06da9fc4fe8a8bbd093aa0879 /lib/Target/PowerPC/PPCISelLowering.cpp
parent41c08405839c49fc6d981c024fc03efb0309acc6 (diff)
Add VerifyNode, a place to put sanity checks on
generic SDNode's (nodes with their own constructors should do sanity checking in the constructor). Add sanity checks for BUILD_VECTOR and fix all the places that were producing bogus BUILD_VECTORs, as found by "make check". My favorite is the BUILD_VECTOR with only two operands that was being used to build a vector with four elements! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53850 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.cpp')
-rw-r--r--lib/Target/PowerPC/PPCISelLowering.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index ad16baa6c1..2ea48cf89d 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -3281,10 +3281,10 @@ static SDOperand BuildVSLDOI(SDOperand LHS, SDOperand RHS, unsigned Amt,
// Force LHS/RHS to be the right type.
LHS = DAG.getNode(ISD::BIT_CONVERT, MVT::v16i8, LHS);
RHS = DAG.getNode(ISD::BIT_CONVERT, MVT::v16i8, RHS);
-
+
SDOperand Ops[16];
for (unsigned i = 0; i != 16; ++i)
- Ops[i] = DAG.getConstant(i+Amt, MVT::i32);
+ Ops[i] = DAG.getConstant(i+Amt, MVT::i8);
SDOperand T = DAG.getNode(ISD::VECTOR_SHUFFLE, MVT::v16i8, LHS, RHS,
DAG.getNode(ISD::BUILD_VECTOR, MVT::v16i8, Ops,16));
return DAG.getNode(ISD::BIT_CONVERT, VT, T);
@@ -3529,7 +3529,7 @@ static SDOperand GeneratePerfectShuffle(unsigned PFEntry, SDOperand LHS,
}
SDOperand Ops[16];
for (unsigned i = 0; i != 16; ++i)
- Ops[i] = DAG.getConstant(ShufIdxs[i], MVT::i32);
+ Ops[i] = DAG.getConstant(ShufIdxs[i], MVT::i8);
return DAG.getNode(ISD::VECTOR_SHUFFLE, OpLHS.getValueType(), OpLHS, OpRHS,
DAG.getNode(ISD::BUILD_VECTOR, MVT::v16i8, Ops, 16));