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| author | Nicolas Geoffray <nicolas.geoffray@lip6.fr> | 2008-03-10 14:12:10 +0000 |
|---|---|---|
| committer | Nicolas Geoffray <nicolas.geoffray@lip6.fr> | 2008-03-10 14:12:10 +0000 |
| commit | 0404cd97e4f6ebfe4f8057d4e21119d77654dff2 (patch) | |
| tree | f8eaeeab041e758e338d0b1beab8647d7e8e2090 /lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | 074223a124e945ee67cacedb99e777265a0c6cb6 (diff) | |
Add description of individual bits in CR. This fix PR1765.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48143 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index ea7f25b36b..17c28380b3 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -1950,8 +1950,8 @@ SDOperand PPCTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG, // With the ELF 32 ABI, set CR6 to true if this is a vararg call. if (isVarArg && isELF32_ABI) { - SDOperand SetCR(DAG.getTargetNode(PPC::SETCR, MVT::i32), 0); - Chain = DAG.getCopyToReg(Chain, PPC::CR6, SetCR, InFlag); + SDOperand SetCR(DAG.getTargetNode(PPC::CRSET, MVT::i32), 0); + Chain = DAG.getCopyToReg(Chain, PPC::CR1EQ, SetCR, InFlag); InFlag = Chain.getValue(1); } |