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| author | Evan Cheng <evan.cheng@apple.com> | 2005-12-01 00:18:45 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2005-12-01 00:18:45 +0000 |
| commit | 66a48bbc3565b40ea0e6f2d58cf5e3a8e64802ef (patch) | |
| tree | 581c3a92474988022c6c8de897e1b265c1078cdc /lib/Target/PowerPC/PPCISelDAGToDAG.cpp | |
| parent | 86193d1190b30a537415fc1c384f4e51039fab74 (diff) | |
Teach tblgen to accept register source operands in patterns, e.g.
def SHL8rCL : I<0xD2, MRM4r, (ops R8 :$dst, R8 :$src),
"shl{b} {%cl, $dst|$dst, %CL}",
[(set R8:$dst, (shl R8:$src, CL))]>, Imp<[CL],[]>;
This generates a CopyToReg operand and added its 2nd result to the shl as
a flag operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24557 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelDAGToDAG.cpp')
0 files changed, 0 insertions, 0 deletions