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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2013-03-26 10:55:20 +0000
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2013-03-26 10:55:20 +0000
commit2b0850b8305380244ec98e1b1c89aaf57adf3b09 (patch)
treece19f29be364c41527b5d67422a9ec6684e592fc /lib/Target/PowerPC/PPCISelDAGToDAG.cpp
parenta01c7dbaabae7cf569410bedd71361b75f65875f (diff)
PowerPC: Remove ADDIL patterns.
The ADDI/ADDI8 patterns are currently duplicated into ADDIL/ADDI8L, which describe the same instruction, except that they accept a symbolLo[64] operand instead of a s16imm[64] operand. This duplication confuses the asm parser, and it actually not really needed, since symbolLo[64] already accepts immediate operands anyway. So this commit removes the duplicate patterns. No change in generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178004 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelDAGToDAG.cpp')
-rw-r--r--lib/Target/PowerPC/PPCISelDAGToDAG.cpp3
1 files changed, 1 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 8b307971f2..95efc11b53 100644
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -1477,8 +1477,7 @@ void PPCDAGToDAGISel::PostprocessISelDAG() {
default: continue;
case PPC::ADDI8:
- case PPC::ADDI8L:
- case PPC::ADDIL:
+ case PPC::ADDI:
// In some cases (such as TLS) the relocation information
// is already in place on the operand, so copying the operand
// is sufficient.