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authorChris Lattner <sabre@nondot.org>2005-08-30 00:59:16 +0000
committerChris Lattner <sabre@nondot.org>2005-08-30 00:59:16 +0000
commit15055733f85da5dc9a29e64cc1a2eeda38898f68 (patch)
treebaf3a73dc83d96cc8d2f6bbc56c2431fb988ec0c /lib/Target/PowerPC/PPCISelDAGToDAG.cpp
parent6de08f4377302cb73ca6a378410889be423af20f (diff)
The first operand to AND does not always have more than two operands. This
fixes MediaBench/toast with the dag selector git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23141 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelDAGToDAG.cpp')
-rw-r--r--lib/Target/PowerPC/PPCISelDAGToDAG.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index a0af76570a..f2d65697da 100644
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -167,7 +167,8 @@ static bool isRotateAndMask(SDNode *N, unsigned Mask, bool IsShiftMask,
unsigned Shift = 32;
unsigned Indeterminant = ~0; // bit mask marking indeterminant results
unsigned Opcode = N->getOpcode();
- if (!isIntImmediate(N->getOperand(1).Val, Shift) || (Shift > 31))
+ if (N->getNumOperands() != 2 ||
+ !isIntImmediate(N->getOperand(1).Val, Shift) || (Shift > 31))
return false;
if (Opcode == ISD::SHL) {