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authorTorok Edwin <edwintorok@gmail.com>2009-07-14 16:55:14 +0000
committerTorok Edwin <edwintorok@gmail.com>2009-07-14 16:55:14 +0000
commitc23197a26f34f559ea9797de51e187087c039c42 (patch)
treebf497ec9a02cd2fc0b64e3e58eff037a719a854d /lib/Target/PowerPC/PPCHazardRecognizers.cpp
parent1f316e321a8f2fa0e193c5444584a67a8aabe9a8 (diff)
llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
This adds location info for all llvm_unreachable calls (which is a macro now) in !NDEBUG builds. In NDEBUG builds location info and the message is off (it only prints "UREACHABLE executed"). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75640 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCHazardRecognizers.cpp')
-rw-r--r--lib/Target/PowerPC/PPCHazardRecognizers.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/PowerPC/PPCHazardRecognizers.cpp b/lib/Target/PowerPC/PPCHazardRecognizers.cpp
index 244d3954af..e754d9d5a5 100644
--- a/lib/Target/PowerPC/PPCHazardRecognizers.cpp
+++ b/lib/Target/PowerPC/PPCHazardRecognizers.cpp
@@ -142,7 +142,7 @@ getHazardType(SUnit *SU) {
return Hazard;
switch (InstrType) {
- default: LLVM_UNREACHABLE("Unknown instruction type!");
+ default: llvm_unreachable("Unknown instruction type!");
case PPCII::PPC970_FXU:
case PPCII::PPC970_LSU:
case PPCII::PPC970_FPU:
@@ -168,7 +168,7 @@ getHazardType(SUnit *SU) {
if (isLoad && NumStores) {
unsigned LoadSize;
switch (Opcode) {
- default: LLVM_UNREACHABLE("Unknown load!");
+ default: llvm_unreachable("Unknown load!");
case PPC::LBZ: case PPC::LBZU:
case PPC::LBZX:
case PPC::LBZ8: case PPC::LBZU8:
@@ -236,7 +236,7 @@ void PPCHazardRecognizer970::EmitInstruction(SUnit *SU) {
if (isStore) {
unsigned ThisStoreSize;
switch (Opcode) {
- default: LLVM_UNREACHABLE("Unknown store instruction!");
+ default: llvm_unreachable("Unknown store instruction!");
case PPC::STB: case PPC::STB8:
case PPC::STBU: case PPC::STBU8:
case PPC::STBX: case PPC::STBX8: