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author | Hal Finkel <hfinkel@anl.gov> | 2011-12-05 17:55:17 +0000 |
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committer | Hal Finkel <hfinkel@anl.gov> | 2011-12-05 17:55:17 +0000 |
commit | 3fd0018af1b692cabfa5a002bf41f1e756aa9dde (patch) | |
tree | 7af1ee6eaa17a72254bd7860467313fa4c442ed2 /lib/Target/PowerPC/PPCFrameLowering.cpp | |
parent | 9489487f9863ca9f0ae9b4572d206910f1c5a581 (diff) |
enable PPC register scavenging by default (update tests and remove some FIXMEs)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145819 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCFrameLowering.cpp')
-rw-r--r-- | lib/Target/PowerPC/PPCFrameLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCFrameLowering.cpp b/lib/Target/PowerPC/PPCFrameLowering.cpp index ec4231e6ff..e9a4290bae 100644 --- a/lib/Target/PowerPC/PPCFrameLowering.cpp +++ b/lib/Target/PowerPC/PPCFrameLowering.cpp @@ -772,7 +772,7 @@ PPCFrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, // FIXME: doesn't detect whether or not we need to spill vXX, which requires // r0 for now. - if (RegInfo->requiresRegisterScavenging(MF)) // FIXME (64-bit): Enable. + if (RegInfo->requiresRegisterScavenging(MF)) if (needsFP(MF) || spillsCR(MF)) { const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; |