diff options
| author | Chris Lattner <sabre@nondot.org> | 2005-04-19 05:41:52 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-04-19 05:41:52 +0000 |
| commit | f577c6122f8b51c4e4889f1e1c647ae210c501b8 (patch) | |
| tree | 65b844b1735c3858830097e37835c3bad0cd4003 /lib/Target/PowerPC/PPCCodeEmitter.cpp | |
| parent | 14522e31d98fd44bbc2b0584aa8f2cbbd9104f43 (diff) | |
Add completely untested support for mtcrf/mfcrf encoding
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21353 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCCodeEmitter.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCCodeEmitter.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCCodeEmitter.cpp b/lib/Target/PowerPC/PPCCodeEmitter.cpp index 57b92b4f16..574e21e7cb 100644 --- a/lib/Target/PowerPC/PPCCodeEmitter.cpp +++ b/lib/Target/PowerPC/PPCCodeEmitter.cpp @@ -186,6 +186,13 @@ int PPC32CodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) { // or things that get fixed up later by the JIT. if (MO.isRegister()) { rv = enumRegToMachineReg(MO.getReg()); + + // Special encoding for MTCRF and MFCRF, which uses a bit mask for the + // register, not the register number directly. + if ((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFCRF) && + (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)) { + rv = 0x80 >> rv; + } } else if (MO.isImmediate()) { rv = MO.getImmedValue(); } else if (MO.isGlobalAddress() || MO.isExternalSymbol()) { |