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authorNate Begeman <natebegeman@mac.com>2004-10-23 00:50:23 +0000
committerNate Begeman <natebegeman@mac.com>2004-10-23 00:50:23 +0000
commit31dfc52b81cc4d03f8b0c87b15b53412229b0154 (patch)
tree7ff5f26dd6bfdbef22f64f463141fd7ee8e74a35 /lib/Target/PowerPC/PPC32ISelSimple.cpp
parentec8430270a9f1adbf9b790319a1d4781658359fd (diff)
Kill casts from integer types to unsigned byte, when the cast was only used
as the shift amount operand to a shift instruction. This was causing us to emit unnecessary clear operations for code such as: int foo(int x) { return 1 << x; } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17175 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPC32ISelSimple.cpp')
-rw-r--r--lib/Target/PowerPC/PPC32ISelSimple.cpp13
1 files changed, 13 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPC32ISelSimple.cpp b/lib/Target/PowerPC/PPC32ISelSimple.cpp
index 44d307d118..f5a21f07c0 100644
--- a/lib/Target/PowerPC/PPC32ISelSimple.cpp
+++ b/lib/Target/PowerPC/PPC32ISelSimple.cpp
@@ -3014,6 +3014,19 @@ void PPC32ISel::visitCastInst(CastInst &CI) {
unsigned DestReg = getReg(CI);
MachineBasicBlock::iterator MI = BB->end();
+ // If this is a cast from an integer type to a ubyte, with one use where the
+ // use is the shift amount argument of a shift instruction, just emit a move
+ // instead (since the shift instruction will only look at the low 5 bits
+ // regardless of how it is sign extended)
+ if (CI.getType() == Type::UByteTy && SrcClass <= cInt && CI.hasOneUse()) {
+ ShiftInst *SI = dyn_cast<ShiftInst>(*(CI.use_begin()));
+ if (SI && (SI->getOperand(1) == &CI)) {
+ unsigned SrcReg = getReg(Op, BB, MI);
+ BuildMI(*BB, MI, PPC::OR, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
+ return;
+ }
+ }
+
// If this is a cast from an byte, short, or int to an integer type of equal
// or lesser width, and all uses of the cast are store instructions then dont
// emit them, as the store instruction will implicitly not store the zero or